[  887.227247] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.227299] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.227598] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.227788] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.227815] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 000000004119b7c0
[  887.227845] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.227859] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.227870] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 0000000040772b72 state to 000000004119b7c0
[  887.227889] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.227901] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 000000008a2a94d9 state to 000000004119b7c0
[  887.227919] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.227937] [drm:dpu_plane_duplicate_state] plane44 
[  887.227950] [drm:drm_mode_object_get] OBJ ID: 96 (2)
[  887.227961] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 000000001fd74c04 state to 000000004119b7c0
[  887.227982] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:97] for [PLANE:44:plane-0] state 000000001fd74c04
[  887.227996] [drm:drm_mode_object_get] OBJ ID: 97 (3)
[  887.228004] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.228011] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (4)
[  887.228018] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.228031] [drm:dpu_plane_duplicate_state] plane80 
[  887.228038] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 00000000294fb00b state to 000000004119b7c0
[  887.228047] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 00000000294fb00b
[  887.228061] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.228068] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.228078] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 000000004119b7c0
[  887.228099] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.228110] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.228121] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 000000004119b7c0
[  887.228136] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 0000000069114d0f to 000000004119b7c0
[  887.228147] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 000000004119b7c0
[  887.228163] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.228174] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 00000000e3a490f0 to 000000004119b7c0
[  887.228200] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.228212] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.228226] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.228237] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.228248] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.228258] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.228269] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.228279] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.228296] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 000000004119b7c0 nonblocking
[  887.228310] [drm:dpu_plane_prepare_fb] plane44 FB[97]
[  887.229249] [drm] Loaded GMU firmware v2.1.8
[  887.230823] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.230942] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.234170] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.234256] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.234322] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.234381] [drm:dpu_crtc_atomic_begin] crtc92
[  887.234464] [drm:_dpu_crtc_blend_setup] crtc92
[  887.234507] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 97 multirect_idx 0
[  887.234561] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.234619] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.234665] [drm:dpu_plane_atomic_update] plane44 
[  887.234714] [drm:dpu_plane_atomic_update] plane44 FB[97] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.234820] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.234880] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.234927] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.234983] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.235046] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.235097] [drm:dpu_crtc_atomic_flush] crtc92
[  887.235132] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.235224] msm_dpu ae01000.display-controller: [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0
[  887.235300] [drm:_dpu_encoder_irq_enable] enc32 
[  887.235347] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.235400] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.241267] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.241357] [drm:dpu_plane_cleanup_fb] plane44 FB[96]
[  887.241422] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.241419] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 000000004119b7c0
[  887.241448] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.241481] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.241528] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.241557] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887238819035
[  887.241571] [drm:dpu_crtc_destroy_state] crtc92
[  887.241605] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.241606] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.241651] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (2)
[  887.241695] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (1)
[  887.241706] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.241746] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.241762] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 00000000c9817926
[  887.241760] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 000000004119b7c0
[  887.241781] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.241793] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.241806] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 0000000040794a48 state to 00000000c9817926
[  887.241822] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.241833] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 00000000cc02730b state to 00000000c9817926
[  887.241846] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.241856] [drm:dpu_plane_duplicate_state] plane44 
[  887.241864] [drm:drm_mode_object_get] OBJ ID: 97 (2)
[  887.241871] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 0000000000ad1145 state to 00000000c9817926
[  887.241885] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:96] for [PLANE:44:plane-0] state 0000000000ad1145
[  887.241895] [drm:drm_mode_object_get] OBJ ID: 96 (3)
[  887.241902] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.241909] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (4)
[  887.241916] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.241925] [drm:drm_mode_object_get] OBJ ID: 99 (3)
[  887.241932] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (4)
[  887.241940] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (3)
[  887.241948] [drm:dpu_plane_duplicate_state] plane80 
[  887.241955] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 00000000a5a0a1bd state to 00000000c9817926
[  887.241965] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 00000000a5a0a1bd
[  887.241976] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.241984] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.241993] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 00000000c9817926
[  887.242006] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.242014] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.242024] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 00000000c9817926
[  887.242035] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 000000003b19dfef to 00000000c9817926
[  887.242045] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 00000000c9817926
[  887.242056] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.242064] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 0000000008b24489 to 00000000c9817926
[  887.242079] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.242086] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.242099] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.242110] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.242120] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.242132] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.242141] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.242151] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.242164] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 00000000c9817926 nonblocking
[  887.242176] [drm:dpu_plane_prepare_fb] plane44 FB[96]
[  887.242198] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.242208] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (3)
[  887.242216] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (2)
[  887.242476] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.242537] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.242596] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.242650] [drm:dpu_crtc_atomic_begin] crtc92
[  887.242689] [drm:_dpu_crtc_blend_setup] crtc92
[  887.242726] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 96 multirect_idx 0
[  887.242773] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.242823] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.242864] [drm:dpu_plane_atomic_update] plane44 
[  887.242904] [drm:dpu_plane_atomic_update] plane44 FB[96] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.243000] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.243057] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.243101] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.243156] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.243215] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.243262] [drm:dpu_crtc_atomic_flush] crtc92
[  887.243295] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.243364] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.243406] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.243445] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.243488] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.247682] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.247797] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.258174] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887255457160
[  887.258217] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.258324] [drm:dpu_plane_cleanup_fb] plane44 FB[97]
[  887.258381] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.258383] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c9817926
[  887.258405] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.258490] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.258543] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.258586] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.258587] [drm:dpu_crtc_destroy_state] crtc92
[  887.258624] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.258668] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (2)
[  887.258689] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.258725] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.258727] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 00000000c9817926
[  887.258742] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 0000000083bdf0b0
[  887.258761] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.258771] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.258781] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 00000000c2357db6 state to 0000000083bdf0b0
[  887.258796] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.258807] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 00000000f3ad2909 state to 0000000083bdf0b0
[  887.258821] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.258833] [drm:dpu_plane_duplicate_state] plane44 
[  887.258842] [drm:drm_mode_object_get] OBJ ID: 96 (2)
[  887.258849] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 000000009b0a9033 state to 0000000083bdf0b0
[  887.258863] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:97] for [PLANE:44:plane-0] state 000000009b0a9033
[  887.258873] [drm:drm_mode_object_get] OBJ ID: 97 (3)
[  887.258880] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.258887] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (4)
[  887.258894] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.258903] [drm:drm_mode_object_get] OBJ ID: 100 (3)
[  887.258911] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (4)
[  887.258918] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (3)
[  887.258928] [drm:dpu_plane_duplicate_state] plane80 
[  887.258935] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 00000000294fb00b state to 0000000083bdf0b0
[  887.258945] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 00000000294fb00b
[  887.258956] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.258963] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.258972] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 0000000083bdf0b0
[  887.258986] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.258995] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.259005] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 0000000083bdf0b0
[  887.259016] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 00000000f5d2d715 to 0000000083bdf0b0
[  887.259026] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 0000000083bdf0b0
[  887.259038] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.259046] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 00000000ba340918 to 0000000083bdf0b0
[  887.259060] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.259067] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.259080] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.259090] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.259100] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.259110] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.259120] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.259129] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.259143] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 0000000083bdf0b0 nonblocking
[  887.259155] [drm:dpu_plane_prepare_fb] plane44 FB[97]
[  887.259182] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.259192] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (3)
[  887.259199] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (2)
[  887.259257] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.259316] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.259373] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.259427] [drm:dpu_crtc_atomic_begin] crtc92
[  887.259465] [drm:_dpu_crtc_blend_setup] crtc92
[  887.259501] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 97 multirect_idx 0
[  887.259552] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.259604] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.259644] [drm:dpu_plane_atomic_update] plane44 
[  887.259684] [drm:dpu_plane_atomic_update] plane44 FB[97] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.259780] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.259835] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.259879] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.259934] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.259996] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.260044] [drm:dpu_crtc_atomic_flush] crtc92
[  887.260078] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.260147] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.260188] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.260226] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.260272] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.265155] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.265261] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.274826] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887272123202
[  887.274828] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.274931] [drm:dpu_plane_cleanup_fb] plane44 FB[96]
[  887.274990] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.274991] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000083bdf0b0
[  887.275014] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.275050] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.275099] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.275142] [drm:dpu_crtc_destroy_state] crtc92
[  887.275160] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.275180] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.275224] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (2)
[  887.275256] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.275267] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (1)
[  887.275294] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.275310] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 0000000049a291c1
[  887.275330] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.275341] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.275330] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 0000000083bdf0b0
[  887.275352] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 000000001fd74c04 state to 0000000049a291c1
[  887.275367] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.275377] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 000000008a2a94d9 state to 0000000049a291c1
[  887.275390] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.275400] [drm:dpu_plane_duplicate_state] plane44 
[  887.275407] [drm:drm_mode_object_get] OBJ ID: 97 (2)
[  887.275415] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 0000000040772b72 state to 0000000049a291c1
[  887.275427] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:96] for [PLANE:44:plane-0] state 0000000040772b72
[  887.275437] [drm:drm_mode_object_get] OBJ ID: 96 (3)
[  887.275444] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.275451] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (4)
[  887.275458] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.275467] [drm:drm_mode_object_get] OBJ ID: 101 (3)
[  887.275474] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (4)
[  887.275481] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (3)
[  887.275489] [drm:dpu_plane_duplicate_state] plane80 
[  887.275496] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 000000002f745458 state to 0000000049a291c1
[  887.275506] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 000000002f745458
[  887.275517] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.275524] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.275534] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 0000000049a291c1
[  887.275547] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.275556] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.275564] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 0000000049a291c1
[  887.275576] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 00000000fc2180a4 to 0000000049a291c1
[  887.275586] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 0000000049a291c1
[  887.275597] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.275606] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 0000000006473f6a to 0000000049a291c1
[  887.275622] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.275629] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.275641] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.275652] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.275662] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.275672] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.275681] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.275691] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.275705] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 0000000049a291c1 nonblocking
[  887.275717] [drm:dpu_plane_prepare_fb] plane44 FB[96]
[  887.275742] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.275751] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (3)
[  887.275759] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (2)
[  887.275816] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.275875] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.275933] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.275987] [drm:dpu_crtc_atomic_begin] crtc92
[  887.276025] [drm:_dpu_crtc_blend_setup] crtc92
[  887.276061] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 96 multirect_idx 0
[  887.276110] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.276162] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.276202] [drm:dpu_plane_atomic_update] plane44 
[  887.276241] [drm:dpu_plane_atomic_update] plane44 FB[96] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.276339] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.276395] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.276440] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.276496] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.276556] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.276603] [drm:dpu_crtc_atomic_flush] crtc92
[  887.276639] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.276707] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.276748] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.276787] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.276833] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.283050] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.283156] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.291469] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.291493] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887288786170
[  887.291578] [drm:dpu_plane_cleanup_fb] plane44 FB[97]
[  887.291639] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.291640] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000049a291c1
[  887.291663] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.291698] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.291745] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.291787] [drm:dpu_crtc_destroy_state] crtc92
[  887.291808] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.291822] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.291866] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (2)
[  887.291913] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.291910] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (1)
[  887.291953] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.291969] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 000000004950156f
[  887.291969] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 0000000049a291c1
[  887.291987] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.291998] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.292009] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 00000000664be29d state to 000000004950156f
[  887.292023] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.292033] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 000000004ad8efc8 state to 000000004950156f
[  887.292044] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.292053] [drm:dpu_plane_duplicate_state] plane44 
[  887.292061] [drm:drm_mode_object_get] OBJ ID: 96 (2)
[  887.292068] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 00000000b17f0693 state to 000000004950156f
[  887.292081] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:97] for [PLANE:44:plane-0] state 00000000b17f0693
[  887.292091] [drm:drm_mode_object_get] OBJ ID: 97 (3)
[  887.292098] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.292105] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (4)
[  887.292112] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.292121] [drm:drm_mode_object_get] OBJ ID: 99 (3)
[  887.292128] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (4)
[  887.292136] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (3)
[  887.292144] [drm:dpu_plane_duplicate_state] plane80 
[  887.292150] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 00000000082629e4 state to 000000004950156f
[  887.292160] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 00000000082629e4
[  887.292171] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.292178] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.292187] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 000000004950156f
[  887.292200] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.292208] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.292217] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 000000004950156f
[  887.292229] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 00000000404fc8d2 to 000000004950156f
[  887.292238] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 000000004950156f
[  887.292249] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.292257] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 00000000194b7c6f to 000000004950156f
[  887.292272] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.292278] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.292290] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.292300] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.292310] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.292320] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.292331] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.292340] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.292353] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 000000004950156f nonblocking
[  887.292365] [drm:dpu_plane_prepare_fb] plane44 FB[97]
[  887.292391] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.292401] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (3)
[  887.292408] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (2)
[  887.292469] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.292529] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.292587] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.292640] [drm:dpu_crtc_atomic_begin] crtc92
[  887.292678] [drm:_dpu_crtc_blend_setup] crtc92
[  887.292715] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 97 multirect_idx 0
[  887.292762] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.292814] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.292857] [drm:dpu_plane_atomic_update] plane44 
[  887.292897] [drm:dpu_plane_atomic_update] plane44 FB[97] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.292994] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.293050] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.293094] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.293148] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.293206] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.293252] [drm:dpu_crtc_atomic_flush] crtc92
[  887.293286] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.293356] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.293396] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.293434] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.293481] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.300584] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.300684] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.308154] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887305451379
[  887.308139] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.308240] [drm:dpu_plane_cleanup_fb] plane44 FB[96]
[  887.308300] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.308301] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 000000004950156f
[  887.308324] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.308360] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.308408] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.308450] [drm:dpu_crtc_destroy_state] crtc92
[  887.308466] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.308489] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.308533] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (2)
[  887.308563] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.308577] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (1)
[  887.308597] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.308612] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 0000000052c07d32
[  887.308632] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.308643] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.308654] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 00000000e984df0a state to 0000000052c07d32
[  887.308641] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 000000004950156f
[  887.308670] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.308681] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 000000002bef2f72 state to 0000000052c07d32
[  887.308695] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.308708] [drm:dpu_plane_duplicate_state] plane44 
[  887.308719] [drm:drm_mode_object_get] OBJ ID: 97 (2)
[  887.308729] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 00000000bf949331 state to 0000000052c07d32
[  887.308747] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:96] for [PLANE:44:plane-0] state 00000000bf949331
[  887.308761] [drm:drm_mode_object_get] OBJ ID: 96 (3)
[  887.308769] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.308777] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (4)
[  887.308785] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.308795] [drm:drm_mode_object_get] OBJ ID: 100 (3)
[  887.308802] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (4)
[  887.308810] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (3)
[  887.308818] [drm:dpu_plane_duplicate_state] plane80 
[  887.308825] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 00000000cf700789 state to 0000000052c07d32
[  887.308835] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 00000000cf700789
[  887.308845] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.308852] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.308861] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 0000000052c07d32
[  887.308873] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.308881] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.308889] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 0000000052c07d32
[  887.308900] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 00000000d03128d4 to 0000000052c07d32
[  887.308911] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 0000000052c07d32
[  887.308922] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.308929] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 00000000c3448e88 to 0000000052c07d32
[  887.308944] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.308951] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.308963] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.308973] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.308983] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.308992] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.309002] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.309012] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.309024] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 0000000052c07d32 nonblocking
[  887.309036] [drm:dpu_plane_prepare_fb] plane44 FB[96]
[  887.309061] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.309071] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (3)
[  887.309078] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (2)
[  887.309078] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.309138] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.309195] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.309249] [drm:dpu_crtc_atomic_begin] crtc92
[  887.309288] [drm:_dpu_crtc_blend_setup] crtc92
[  887.309325] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 96 multirect_idx 0
[  887.309372] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.309423] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.309464] [drm:dpu_plane_atomic_update] plane44 
[  887.309502] [drm:dpu_plane_atomic_update] plane44 FB[96] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.309600] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.309657] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.309701] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.309756] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.309815] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.309862] [drm:dpu_crtc_atomic_flush] crtc92
[  887.309895] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.309962] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.310004] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.310041] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.310088] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.318331] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.318460] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.324573] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.324657] [drm:dpu_plane_cleanup_fb] plane44 FB[97]
[  887.324717] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.324713] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000052c07d32
[  887.324742] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.324771] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.324822] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887322124764
[  887.324816] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.324860] [drm:dpu_crtc_destroy_state] crtc92
[  887.324886] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.324894] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.324938] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (2)
[  887.324980] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (1)
[  887.324988] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.325024] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.325040] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 0000000037994a88
[  887.325039] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 0000000052c07d32
[  887.325059] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.325070] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.325082] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 00000000bacd7ba0 state to 0000000037994a88
[  887.325098] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.325108] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 00000000afbc0354 state to 0000000037994a88
[  887.325122] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.325135] [drm:dpu_plane_duplicate_state] plane44 
[  887.325146] [drm:drm_mode_object_get] OBJ ID: 96 (2)
[  887.325157] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 0000000009e95225 state to 0000000037994a88
[  887.325172] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:97] for [PLANE:44:plane-0] state 0000000009e95225
[  887.325182] [drm:drm_mode_object_get] OBJ ID: 97 (3)
[  887.325189] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.325197] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (4)
[  887.325205] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.325213] [drm:drm_mode_object_get] OBJ ID: 101 (3)
[  887.325220] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (4)
[  887.325227] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (3)
[  887.325236] [drm:dpu_plane_duplicate_state] plane80 
[  887.325243] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 00000000656ea551 state to 0000000037994a88
[  887.325253] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 00000000656ea551
[  887.325263] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.325270] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.325279] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 0000000037994a88
[  887.325292] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.325300] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.325309] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 0000000037994a88
[  887.325320] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 0000000098ecadfc to 0000000037994a88
[  887.325330] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 0000000037994a88
[  887.325341] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.325349] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 00000000e3a490f0 to 0000000037994a88
[  887.325366] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.325372] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.325385] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.325395] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.325405] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.325414] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.325424] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.325434] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.325447] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 0000000037994a88 nonblocking
[  887.325458] [drm:dpu_plane_prepare_fb] plane44 FB[97]
[  887.325490] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.325500] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (3)
[  887.325507] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (2)
[  887.325532] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.325592] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.325650] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.325704] [drm:dpu_crtc_atomic_begin] crtc92
[  887.325741] [drm:_dpu_crtc_blend_setup] crtc92
[  887.325777] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 97 multirect_idx 0
[  887.325823] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.325875] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.325915] [drm:dpu_plane_atomic_update] plane44 
[  887.325954] [drm:dpu_plane_atomic_update] plane44 FB[97] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.326051] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.326106] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.326151] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.326206] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.326264] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.326311] [drm:dpu_crtc_atomic_flush] crtc92
[  887.326343] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.326410] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.326500] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.326542] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.326590] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.335931] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.336043] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.341245] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.341329] [drm:dpu_plane_cleanup_fb] plane44 FB[96]
[  887.341386] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.341384] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000037994a88
[  887.341411] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.341443] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.341487] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.341528] [drm:dpu_crtc_destroy_state] crtc92
[  887.341540] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887338796483
[  887.341556] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.341564] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.341607] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (2)
[  887.341650] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (1)
[  887.341658] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.341700] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.341716] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 00000000715f2711
[  887.341709] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 0000000037994a88
[  887.341736] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.341747] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.341757] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 0000000025a4d6d2 state to 00000000715f2711
[  887.341773] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.341784] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 00000000744e3f31 state to 00000000715f2711
[  887.341799] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.341812] [drm:dpu_plane_duplicate_state] plane44 
[  887.341821] [drm:drm_mode_object_get] OBJ ID: 97 (2)
[  887.341830] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 000000007921d5ba state to 00000000715f2711
[  887.341842] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:96] for [PLANE:44:plane-0] state 000000007921d5ba
[  887.341852] [drm:drm_mode_object_get] OBJ ID: 96 (3)
[  887.341859] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.341866] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (4)
[  887.341874] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.341883] [drm:drm_mode_object_get] OBJ ID: 99 (3)
[  887.341890] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (4)
[  887.341897] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (3)
[  887.341906] [drm:dpu_plane_duplicate_state] plane80 
[  887.341913] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 00000000cf700789 state to 00000000715f2711
[  887.341923] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 00000000cf700789
[  887.341933] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.341941] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.341949] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 00000000715f2711
[  887.341963] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.341971] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.341980] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 00000000715f2711
[  887.341992] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 00000000410bf327 to 00000000715f2711
[  887.342002] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 00000000715f2711
[  887.342013] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.342021] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 0000000008b24489 to 00000000715f2711
[  887.342038] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.342044] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.342057] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.342067] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.342078] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.342088] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.342098] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.342108] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.342121] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 00000000715f2711 nonblocking
[  887.342135] [drm:dpu_plane_prepare_fb] plane44 FB[96]
[  887.342158] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.342168] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (3)
[  887.342175] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (2)
[  887.342231] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.342288] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.342347] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.342399] [drm:dpu_crtc_atomic_begin] crtc92
[  887.342490] [drm:_dpu_crtc_blend_setup] crtc92
[  887.342530] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 96 multirect_idx 0
[  887.342577] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.342627] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.342668] [drm:dpu_plane_atomic_update] plane44 
[  887.342708] [drm:dpu_plane_atomic_update] plane44 FB[96] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.342805] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.342861] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.342906] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.342960] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.343021] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.343067] [drm:dpu_crtc_atomic_flush] crtc92
[  887.343100] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.343169] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.343209] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.343246] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.343292] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.352728] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.352842] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.358144] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887355453670
[  887.358136] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.358238] [drm:dpu_plane_cleanup_fb] plane44 FB[97]
[  887.358293] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.358296] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000715f2711
[  887.358318] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.358356] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.358405] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.358498] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.358493] [drm:dpu_crtc_destroy_state] crtc92
[  887.358534] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.358579] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (2)
[  887.358597] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.358619] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (1)
[  887.358635] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.358650] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 00000000d51c6de2
[  887.358668] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.358680] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.358691] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 00000000bf949331 state to 00000000d51c6de2
[  887.358690] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 00000000715f2711
[  887.358707] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.358718] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 000000002bef2f72 state to 00000000d51c6de2
[  887.358732] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.358743] [drm:dpu_plane_duplicate_state] plane44 
[  887.358754] [drm:drm_mode_object_get] OBJ ID: 96 (2)
[  887.358766] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 00000000e984df0a state to 00000000d51c6de2
[  887.358783] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:97] for [PLANE:44:plane-0] state 00000000e984df0a
[  887.358796] [drm:drm_mode_object_get] OBJ ID: 97 (3)
[  887.358804] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.358812] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (4)
[  887.358819] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.358828] [drm:drm_mode_object_get] OBJ ID: 100 (3)
[  887.358836] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (4)
[  887.358843] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (3)
[  887.358851] [drm:dpu_plane_duplicate_state] plane80 
[  887.358858] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 00000000082629e4 state to 00000000d51c6de2
[  887.358867] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 00000000082629e4
[  887.358878] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.358886] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.358894] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 00000000d51c6de2
[  887.358909] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.358916] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.358925] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 00000000d51c6de2
[  887.358936] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 000000001b3c2c29 to 00000000d51c6de2
[  887.358946] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 00000000d51c6de2
[  887.358957] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.358965] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 00000000f86e348e to 00000000d51c6de2
[  887.358983] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.358989] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.359001] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.359011] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.359022] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.359031] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.359041] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.359051] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.359064] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 00000000d51c6de2 nonblocking
[  887.359075] [drm:dpu_plane_prepare_fb] plane44 FB[97]
[  887.359100] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.359110] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (3)
[  887.359117] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (2)
[  887.359120] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.359183] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.359240] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.359294] [drm:dpu_crtc_atomic_begin] crtc92
[  887.359332] [drm:_dpu_crtc_blend_setup] crtc92
[  887.359371] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 97 multirect_idx 0
[  887.359419] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.359471] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.359511] [drm:dpu_plane_atomic_update] plane44 
[  887.359551] [drm:dpu_plane_atomic_update] plane44 FB[97] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.359647] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.359703] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.359748] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.359804] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.359864] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.359909] [drm:dpu_crtc_atomic_flush] crtc92
[  887.359942] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.360012] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.360052] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.360090] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.360135] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.370412] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.370535] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.374576] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.374662] [drm:dpu_plane_cleanup_fb] plane44 FB[96]
[  887.374725] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.374720] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000d51c6de2
[  887.374750] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.374778] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.374824] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.374867] [drm:dpu_crtc_destroy_state] crtc92
[  887.374896] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.374899] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.374913] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887372130129
[  887.374946] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (2)
[  887.374990] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (1)
[  887.375001] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.375036] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.375052] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 00000000cc86d1a3
[  887.375049] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 00000000d51c6de2
[  887.375071] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.375082] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.375096] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 00000000b17f0693 state to 00000000cc86d1a3
[  887.375111] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.375122] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 000000004ad8efc8 state to 00000000cc86d1a3
[  887.375136] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.375149] [drm:dpu_plane_duplicate_state] plane44 
[  887.375159] [drm:drm_mode_object_get] OBJ ID: 97 (2)
[  887.375169] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 00000000664be29d state to 00000000cc86d1a3
[  887.375183] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:96] for [PLANE:44:plane-0] state 00000000664be29d
[  887.375193] [drm:drm_mode_object_get] OBJ ID: 96 (3)
[  887.375201] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.375208] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (4)
[  887.375215] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.375224] [drm:drm_mode_object_get] OBJ ID: 101 (3)
[  887.375231] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (4)
[  887.375239] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (3)
[  887.375247] [drm:dpu_plane_duplicate_state] plane80 
[  887.375254] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 000000002f745458 state to 00000000cc86d1a3
[  887.375264] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 000000002f745458
[  887.375274] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.375282] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.375290] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 00000000cc86d1a3
[  887.375304] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.375312] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.375321] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 00000000cc86d1a3
[  887.375332] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 000000006188304d to 00000000cc86d1a3
[  887.375342] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 00000000cc86d1a3
[  887.375355] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.375363] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 0000000006473f6a to 00000000cc86d1a3
[  887.375378] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.375384] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.375396] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.375407] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.375417] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.375428] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.375439] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.375449] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.375461] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 00000000cc86d1a3 nonblocking
[  887.375474] [drm:dpu_plane_prepare_fb] plane44 FB[96]
[  887.375497] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.375507] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (3)
[  887.375515] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (2)
[  887.375569] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.375628] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.375686] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.375739] [drm:dpu_crtc_atomic_begin] crtc92
[  887.375777] [drm:_dpu_crtc_blend_setup] crtc92
[  887.375813] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 96 multirect_idx 0
[  887.375860] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.375910] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.375950] [drm:dpu_plane_atomic_update] plane44 
[  887.375991] [drm:dpu_plane_atomic_update] plane44 FB[96] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.376086] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.376142] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.376186] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.376240] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.376300] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.376346] [drm:dpu_crtc_atomic_flush] crtc92
[  887.376379] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.376450] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.376490] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.376529] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.376575] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.388689] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.388792] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.391483] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887388787212
[  887.391491] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.391598] [drm:dpu_plane_cleanup_fb] plane44 FB[97]
[  887.391655] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.391657] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000cc86d1a3
[  887.391678] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.391717] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.391766] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.391807] [drm:dpu_crtc_destroy_state] crtc92
[  887.391822] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.391846] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.391890] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (2)
[  887.391917] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.391936] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (1)
[  887.391952] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.391967] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 000000003f069d41
[  887.391990] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.392001] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.392011] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 0000000040772b72 state to 000000003f069d41
[  887.391999] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 00000000cc86d1a3
[  887.392027] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.392038] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 000000008a2a94d9 state to 000000003f069d41
[  887.392052] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.392064] [drm:dpu_plane_duplicate_state] plane44 
[  887.392075] [drm:drm_mode_object_get] OBJ ID: 96 (2)
[  887.392085] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 000000001fd74c04 state to 000000003f069d41
[  887.392103] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:97] for [PLANE:44:plane-0] state 000000001fd74c04
[  887.392117] [drm:drm_mode_object_get] OBJ ID: 97 (3)
[  887.392126] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.392135] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (4)
[  887.392142] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.392152] [drm:drm_mode_object_get] OBJ ID: 99 (3)
[  887.392159] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (4)
[  887.392166] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (3)
[  887.392176] [drm:dpu_plane_duplicate_state] plane80 
[  887.392183] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 00000000294fb00b state to 000000003f069d41
[  887.392192] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 00000000294fb00b
[  887.392203] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.392210] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.392219] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 000000003f069d41
[  887.392233] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.392241] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.392250] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 000000003f069d41
[  887.392261] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 000000008474a420 to 000000003f069d41
[  887.392271] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 000000003f069d41
[  887.392283] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.392290] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 00000000194b7c6f to 000000003f069d41
[  887.392307] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.392314] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.392326] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.392337] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.392347] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.392356] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.392366] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.392376] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.392389] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 000000003f069d41 nonblocking
[  887.392400] [drm:dpu_plane_prepare_fb] plane44 FB[97]
[  887.392427] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.392437] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (3)
[  887.392444] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (2)
[  887.392471] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.392534] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.392592] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.392647] [drm:dpu_crtc_atomic_begin] crtc92
[  887.392685] [drm:_dpu_crtc_blend_setup] crtc92
[  887.392721] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 97 multirect_idx 0
[  887.392770] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.392821] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.392862] [drm:dpu_plane_atomic_update] plane44 
[  887.392903] [drm:dpu_plane_atomic_update] plane44 FB[97] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.392999] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.393055] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.393099] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.393155] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.393215] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.393261] [drm:dpu_crtc_atomic_flush] crtc92
[  887.393295] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.393364] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.393404] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.393443] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.393488] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.406512] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.406613] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.407904] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.407989] [drm:dpu_plane_cleanup_fb] plane44 FB[96]
[  887.408047] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.408046] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 000000003f069d41
[  887.408073] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.408105] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.408155] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887405457420
[  887.408152] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.408195] [drm:dpu_crtc_destroy_state] crtc92
[  887.408218] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.408230] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.408275] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (2)
[  887.408318] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.408318] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (1)
[  887.408354] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.408371] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 000000006b4f3c74
[  887.408389] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.408376] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 000000003f069d41
[  887.408400] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.408410] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 000000009b0a9033 state to 000000006b4f3c74
[  887.408424] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.408435] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 00000000f3ad2909 state to 000000006b4f3c74
[  887.408446] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.408456] [drm:dpu_plane_duplicate_state] plane44 
[  887.408463] [drm:drm_mode_object_get] OBJ ID: 97 (2)
[  887.408470] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 00000000c2357db6 state to 000000006b4f3c74
[  887.408483] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:96] for [PLANE:44:plane-0] state 00000000c2357db6
[  887.408492] [drm:drm_mode_object_get] OBJ ID: 96 (3)
[  887.408499] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.408507] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (4)
[  887.408514] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.408524] [drm:drm_mode_object_get] OBJ ID: 100 (3)
[  887.408531] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (4)
[  887.408538] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (3)
[  887.408546] [drm:dpu_plane_duplicate_state] plane80 
[  887.408553] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 00000000a5a0a1bd state to 000000006b4f3c74
[  887.408563] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 00000000a5a0a1bd
[  887.408573] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.408581] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.408589] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 000000006b4f3c74
[  887.408603] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.408611] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.408620] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 000000006b4f3c74
[  887.408631] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 0000000053b09b5b to 000000006b4f3c74
[  887.408641] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 000000006b4f3c74
[  887.408652] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.408659] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 000000003d6ed997 to 000000006b4f3c74
[  887.408674] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.408681] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.408693] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.408702] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.408712] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.408722] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.408732] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.408742] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.408755] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 000000006b4f3c74 nonblocking
[  887.408768] [drm:dpu_plane_prepare_fb] plane44 FB[96]
[  887.408795] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.408804] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (3)
[  887.408811] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (2)
[  887.408865] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.408924] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.408981] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.409034] [drm:dpu_crtc_atomic_begin] crtc92
[  887.409071] [drm:_dpu_crtc_blend_setup] crtc92
[  887.409107] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 96 multirect_idx 0
[  887.409154] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.409204] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.409245] [drm:dpu_plane_atomic_update] plane44 
[  887.409283] [drm:dpu_plane_atomic_update] plane44 FB[96] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.409378] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.409434] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.409478] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.409533] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.409593] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.409639] [drm:dpu_crtc_atomic_flush] crtc92
[  887.409673] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.409741] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.409781] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.409821] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.409866] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.424054] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.424160] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.424819] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887422120181
[  887.424801] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.424904] [drm:dpu_plane_cleanup_fb] plane44 FB[97]
[  887.424959] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.424962] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 000000006b4f3c74
[  887.424983] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.425022] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.425070] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.425112] [drm:dpu_crtc_destroy_state] crtc92
[  887.425128] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.425151] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.425196] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (2)
[  887.425229] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.425241] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (1)
[  887.425264] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.425282] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 000000004b9439c5
[  887.425301] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.425296] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 000000006b4f3c74
[  887.425312] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.425323] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 0000000000ad1145 state to 000000004b9439c5
[  887.425337] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.425347] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 00000000cc02730b state to 000000004b9439c5
[  887.425362] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.425374] [drm:dpu_plane_duplicate_state] plane44 
[  887.425385] [drm:drm_mode_object_get] OBJ ID: 96 (2)
[  887.425395] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 0000000040794a48 state to 000000004b9439c5
[  887.425410] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:97] for [PLANE:44:plane-0] state 0000000040794a48
[  887.425420] [drm:drm_mode_object_get] OBJ ID: 97 (3)
[  887.425427] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.425434] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (4)
[  887.425441] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.425450] [drm:drm_mode_object_get] OBJ ID: 101 (3)
[  887.425457] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (4)
[  887.425464] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (3)
[  887.425473] [drm:dpu_plane_duplicate_state] plane80 
[  887.425480] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 00000000294fb00b state to 000000004b9439c5
[  887.425489] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 00000000294fb00b
[  887.425500] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.425507] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.425516] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 000000004b9439c5
[  887.425529] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.425537] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.425546] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 000000004b9439c5
[  887.425557] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 0000000014de9aad to 000000004b9439c5
[  887.425567] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 000000004b9439c5
[  887.425578] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.425586] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 00000000e3a490f0 to 000000004b9439c5
[  887.425601] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.425607] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.425619] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.425630] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.425640] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.425649] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.425659] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.425669] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.425682] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 000000004b9439c5 nonblocking
[  887.425692] [drm:dpu_plane_prepare_fb] plane44 FB[97]
[  887.425714] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.425724] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (3)
[  887.425731] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (2)
[  887.425730] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.425790] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.425848] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.425902] [drm:dpu_crtc_atomic_begin] crtc92
[  887.425940] [drm:_dpu_crtc_blend_setup] crtc92
[  887.425977] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 97 multirect_idx 0
[  887.426025] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.426076] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.426118] [drm:dpu_plane_atomic_update] plane44 
[  887.426160] [drm:dpu_plane_atomic_update] plane44 FB[97] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.426256] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.426313] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.426357] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.426414] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.426519] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.426569] [drm:dpu_crtc_atomic_flush] crtc92
[  887.426604] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.426674] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.426715] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.426754] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.426799] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.441245] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.441334] [drm:dpu_plane_cleanup_fb] plane44 FB[96]
[  887.441390] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 000000004b9439c5
[  887.441422] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.441449] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.441487] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887438799347
[  887.441494] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.441523] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.441540] [drm:dpu_crtc_destroy_state] crtc92
[  887.441573] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.441616] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (2)
[  887.441660] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (1)
[  887.441721] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.441715] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 000000004b9439c5
[  887.441746] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.441892] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.441993] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.442032] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.442048] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 00000000465276d7
[  887.442066] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.442077] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.442088] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 000000001fd74c04 state to 00000000465276d7
[  887.442102] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.442113] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 000000008a2a94d9 state to 00000000465276d7
[  887.442127] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.442140] [drm:dpu_plane_duplicate_state] plane44 
[  887.442150] [drm:drm_mode_object_get] OBJ ID: 97 (2)
[  887.442161] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 0000000040772b72 state to 00000000465276d7
[  887.442174] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:96] for [PLANE:44:plane-0] state 0000000040772b72
[  887.442184] [drm:drm_mode_object_get] OBJ ID: 96 (3)
[  887.442191] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.442199] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (4)
[  887.442206] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.442214] [drm:drm_mode_object_get] OBJ ID: 99 (3)
[  887.442221] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (4)
[  887.442229] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (3)
[  887.442237] [drm:dpu_plane_duplicate_state] plane80 
[  887.442243] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 000000002f745458 state to 00000000465276d7
[  887.442252] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 000000002f745458
[  887.442263] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.442271] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.442280] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 00000000465276d7
[  887.442292] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.442301] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.442309] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 00000000465276d7
[  887.442321] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 0000000055fc916a to 00000000465276d7
[  887.442330] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 00000000465276d7
[  887.442341] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.442349] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 0000000008b24489 to 00000000465276d7
[  887.442364] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.442371] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.442383] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.442393] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.442403] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.442413] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.442447] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.442458] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.442472] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 00000000465276d7 nonblocking
[  887.442483] [drm:dpu_plane_prepare_fb] plane44 FB[96]
[  887.442509] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.442519] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (3)
[  887.442527] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (2)
[  887.442564] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.442630] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.442691] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.442746] [drm:dpu_crtc_atomic_begin] crtc92
[  887.442785] [drm:_dpu_crtc_blend_setup] crtc92
[  887.442823] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 96 multirect_idx 0
[  887.442870] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.442922] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.442964] [drm:dpu_plane_atomic_update] plane44 
[  887.443003] [drm:dpu_plane_atomic_update] plane44 FB[96] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.443099] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.443155] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.443199] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.443254] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.443316] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.443363] [drm:dpu_crtc_atomic_flush] crtc92
[  887.443397] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.443465] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.443507] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.443544] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.443590] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.457932] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.458016] [drm:dpu_plane_cleanup_fb] plane44 FB[97]
[  887.458072] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000465276d7
[  887.458125] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.458170] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.458212] [drm:dpu_crtc_destroy_state] crtc92
[  887.458239] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887455485233
[  887.458244] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.458288] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (2)
[  887.458332] [drm:drm_mode_object_put.part.0] OBJ ID: 101 (1)
[  887.458388] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 00000000465276d7
[  887.458807] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.458911] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="retroarch" pid=3823, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.459121] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_SUBMITQUEUE_QUERY
[  887.459145] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GET_PARAM
[  887.459287] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe280, auth=1, MSM_GEM_SUBMIT
[  887.459382] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_CREATEPROPBLOB
[  887.459417] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  887.459433] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_init] Allocated atomic state 00000000dbae4928
[  887.459451] [drm:drm_mode_object_get] OBJ ID: 33 (4)
[  887.459462] [drm:drm_mode_object_get] OBJ ID: 33 (5)
[  887.459472] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_connector_state] Added [CONNECTOR:33:DSI-1] 00000000664be29d state to 00000000dbae4928
[  887.459484] [drm:drm_mode_object_get] OBJ ID: 98 (2)
[  887.459492] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_crtc_state] Added [CRTC:92:crtc-0] 000000004ad8efc8 state to 00000000dbae4928
[  887.459502] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (6)
[  887.459511] [drm:dpu_plane_duplicate_state] plane44 
[  887.459518] [drm:drm_mode_object_get] OBJ ID: 96 (2)
[  887.459526] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane-0] 00000000b17f0693 state to 00000000dbae4928
[  887.459538] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [FB:97] for [PLANE:44:plane-0] state 00000000b17f0693
[  887.459547] [drm:drm_mode_object_get] OBJ ID: 97 (3)
[  887.459554] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (3)
[  887.459562] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (4)
[  887.459569] [drm:drm_mode_object_put.part.0] OBJ ID: 97 (3)
[  887.459577] [drm:drm_mode_object_get] OBJ ID: 100 (3)
[  887.459584] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (4)
[  887.459592] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (3)
[  887.459600] [drm:dpu_plane_duplicate_state] plane80 
[  887.459607] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_plane_state] Added [PLANE:80:plane-6] 00000000082629e4 state to 00000000dbae4928
[  887.459616] msm_dpu ae01000.display-controller: [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:80:plane-6] state 00000000082629e4
[  887.459627] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (5)
[  887.459634] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (4)
[  887.459642] msm_dpu ae01000.display-controller: [drm:drm_atomic_check_only] checking 00000000dbae4928
[  887.459655] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:33:DSI-1]
[  887.459663] msm_dpu ae01000.display-controller: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:33:DSI-1] keeps [ENCODER:32:DSI-32], now on [CRTC:92:crtc-0]
[  887.459671] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 00000000dbae4928
[  887.459682] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000cd8c58de state 00000000e10eb763 to 00000000dbae4928
[  887.459691] msm_dpu ae01000.display-controller: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:32:DSI-32] to 00000000dbae4928
[  887.459702] [drm:dpu_encoder_virt_atomic_check] enc32 
[  887.459709] msm_dpu ae01000.display-controller: [drm:drm_atomic_get_private_obj_state] Added new private object 00000000ea3f1391 state 00000000ba340918 to 00000000dbae4928
[  887.459724] [drm:dpu_crtc_atomic_check] crtc92: check
[  887.459731] [drm:dpu_core_perf_crtc_check] crtc=92 clk_rate=132541920 core_ib=800000 core_ab=757382400
[  887.459743] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.459753] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.459763] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.459772] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.459782] [drm:dpu_core_perf_crtc_check] calculated bandwidth=757383k
[  887.459792] [drm:dpu_core_perf_crtc_check] final threshold bw limit = 16600000
[  887.459805] msm_dpu ae01000.display-controller: [drm:drm_atomic_nonblocking_commit] committing 00000000dbae4928 nonblocking
[  887.459816] [drm:dpu_plane_prepare_fb] plane44 FB[97]
[  887.459842] msm_dpu ae01000.display-controller: [drm:drm_ioctl] comm="sway" pid=2399, dev=0xe200, auth=1, DRM_IOCTL_MODE_DESTROYPROPBLOB
[  887.459851] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (3)
[  887.459858] [drm:drm_mode_object_put.part.0] OBJ ID: 100 (2)
[  887.460013] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.460088] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: hwmode: htotal 1108, vtotal 1948, vdisplay 1920
[  887.460149] msm_dpu ae01000.display-controller: [drm:drm_calc_timestamping_constants] crtc 92: clock 129503 kHz framedur 16666671 linedur 8555
[  887.460204] [drm:dpu_crtc_atomic_begin] crtc92
[  887.460242] [drm:_dpu_crtc_blend_setup] crtc92
[  887.460279] [drm:_dpu_crtc_blend_setup_pipe.isra.0] crtc 92 stage:1 - plane 44 sspp 1 fb 97 multirect_idx 0
[  887.460328] [drm:_dpu_crtc_blend_setup] format:XR24 little-endian (0x34325258), alpha_en:0 blend_op:0x100
[  887.460379] [drm:_dpu_crtc_blend_setup] lm 0, op_mode 0x2, ctl 2
[  887.460419] [drm:dpu_plane_atomic_update] plane44 
[  887.460459] [drm:dpu_plane_atomic_update] plane44 FB[97] 1080.000000x1920.000000+0.000000+0.000000->crtc92 1080x1920+0+0, XR24 little-endian (0x34325258) ubwc 1
[  887.460556] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) w:1080 fl:23
[  887.460612] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 ds:1 is_rt:1
[  887.460657] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) rt:1 fl:23 lut:0x11223344556677
[  887.460712] [drm:dpu_plane_sspp_update_pipe] plane44 pnum:0 fmt: XR24 little-endian (0x34325258) mode:2 luts[0xffff, 0xff00]
[  887.460771] [drm:dpu_vbif_set_ot_limit] VBIF_RT xin:0 ot_lim:0
[  887.460817] [drm:dpu_crtc_atomic_flush] crtc92
[  887.460850] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.460920] [drm:dpu_encoder_resource_control] enc32 sw_event:1, work cancelled
[  887.460961] [drm:dpu_encoder_resource_control] id;32, sw_event:1, rc in ON state
[  887.461000] [drm:dpu_crtc_commit_kickoff] crtc92 first commit
[  887.461047] [drm:dpu_encoder_wait_for_commit_done] enc32 
[  887.474895] [drm:dpu_crtc_frame_event_work] crtc92 event:1 ts:887472120493
[  887.475116] [drm:dpu_core_perf_crtc_update] crtc:92 enabled:1 core_clk:132541920
[  887.475220] [drm:dpu_plane_cleanup_fb] plane44 FB[96]
[  887.475280] msm_dpu ae01000.display-controller: [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbae4928
[  887.475334] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (5)
[  887.475384] [drm:drm_mode_object_put.part.0] OBJ ID: 33 (4)
[  887.475427] [drm:dpu_crtc_destroy_state] crtc92
[  887.475462] [drm:drm_mode_object_put.part.0] OBJ ID: 98 (3)
[  887.475505] [drm:drm_mode_object_put.part.0] OBJ ID: 96 (2)
[  887.475548] [drm:drm_mode_object_put.part.0] OBJ ID: 99 (1)
[  887.475608] msm_dpu ae01000.display-controller: [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbae4928
[  887.491197] msm_dpu ae01000.display-controller: [drm:vblank_disable_fn] disabling vblank on crtc 0
[  887.538737] [drm:_dpu_encoder_irq_disable] enc32