FMAP: Found "FLASH" version 1.1 at 0x300000. FMAP: base = 0x0 size = 0x1000000 #areas = 15 FMAP: area COREBOOT found @ 342000 (3657728 bytes) FMAP: area COREBOOT found @ 342000 (3657728 bytes) CBFS: mcache @0xfef04e00 built for 15 files, used 0x354 of 0x2000 bytes CBFS: Found 'fallback/romstage' @0x80 size 0x9ed8 in mcache @0xfef04e2c BS: bootblock times (exec / console): total (unknown) / 43 ms coreboot-4.13-3184-ga0c7f34302 Wed Apr 14 12:18:58 UTC 2021 romstage starting (log level: 7)... CPU: Intel(R) Celeron(R) CPU J3455 @ 1.50GHz CPU: ID 506c9, Apollolake B0, ucode: 0000003c CPU: AES Supported, TXT Not Supported, VT Supported MCH: device id 5af0 (rev 0b) is Apollolake PCH: device id 5ae8 (rev 0b) is Apollolake IGD: device id 5a85 (rev 0b) is Apollolake HD 500 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00000000 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000 prsts: 00000000 tco_sts: 0000 0000 gen_pmcon1: 08004004 gen_pmcon2: 00003a00 gen_pmcon3: 00000000 prev_sleep_state 0 FMAP: area COREBOOT found @ 342000 (3657728 bytes) FMAP: area COREBOOT found @ 342000 (3657728 bytes) CBFS: Found 'fspm.bin' @0x2e200 size 0x59000 in mcache @0xfef04ff4 POST: 0x34 FMAP: area RW_MRC_CACHE found @ 311000 (65536 bytes) MRC: no data in 'RW_MRC_CACHE' FMAP: area RW_VAR_MRC_CACHE found @ 321000 (4096 bytes) MRC: no data in 'RW_VAR_MRC_CACHE' POST: 0x36 POST: 0x92 POST: 0x98 CBMEM: IMD: root @ 0x7afff000 254 entries. IMD: root @ 0x7affec00 62 entries. External stage cache: IMD: root @ 0x7b7ff000 254 entries. IMD: root @ 0x7b7fec00 62 entries. FMAP: area RW_MRC_CACHE found @ 311000 (65536 bytes) MRC: Checking cached data update for 'RW_MRC_CACHE'. SF: Detected 00 0000 with sector size 0x1000, total 0x1000000 MRC: no data in 'RW_MRC_CACHE' MRC: cache data 'RW_MRC_CACHE' needs update. MRC: updated 'RW_MRC_CACHE'. CPU: frequency set to 2300 MHz FMAP: area RW_VAR_MRC_CACHE found @ 321000 (4096 bytes) MRC: Checking cached data update for 'RW_VAR_MRC_CACHE'. MRC: no data in 'RW_VAR_MRC_CACHE' MRC: cache data 'RW_VAR_MRC_CACHE' needs update. MRC: updated 'RW_VAR_MRC_CACHE'. WEAK: src/soc/intel/apollolake/romstage.c/mainboard_save_dimm_info called SMM Memory Map SMRAM : 0x7b000000 0x800000 Subregion 0: 0x7b000000 0x700000 Subregion 1: 0x7b700000 0x100000 Subregion 2: 0x7b800000 0x0 top_of_ram = 0x7b000000 MTRR Range: Start=7a000000 End=7b000000 (Size 1000000) MTRR Range: Start=7b000000 End=7b800000 (Size 800000) MTRR Range: Start=ff000000 End=0 (Size 1000000) Normal boot CBFS: Found 'fallback/postcar' @0xb3000 size 0x52c0 in mcache @0xfef05080 Loading module at 0x7abd1000 with entry 0x7abd1031. filesize: 0x4f50 memsize: 0x92b8 Processing 204 relocs. Offset value of 0x78bd1000 BS: romstage times (exec / console): total (unknown) / 243 ms coreboot-4.13-3184-ga0c7f34302 Wed Apr 14 12:18:58 UTC 2021 postcar starting (log level: 7)... Normal boot FMAP: area COREBOOT found @ 342000 (3657728 bytes) FMAP: area COREBOOT found @ 342000 (3657728 bytes) CBFS: Found 'fallback/ramstage' @0x15cc0 size 0x16302 in mcache @0x7abfd10c Loading module at 0x7ab8a000 with entry 0x7ab8a000. filesize: 0x301d0 memsize: 0x45570 Processing 3099 relocs. Offset value of 0x79d8a000 BS: postcar times (exec / console): total (unknown) / 42 ms coreboot-4.13-3184-ga0c7f34302 Wed Apr 14 12:18:58 UTC 2021 ramstage starting (log level: 7)... POST: 0x39 POST: 0x80 Normal boot ACPI _SWS is PM1 Index 8 GPE Index -1 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms POST: 0x70 BS: BS_PRE_DEVICE run times (exec / console): 0 / 1 ms POST: 0x71 FMAP: area COREBOOT found @ 342000 (3657728 bytes) FMAP: area COREBOOT found @ 342000 (3657728 bytes) CBFS: Found 'fsps.bin' @0x87fc0 size 0x2b000 in mcache @0x7abfd240 WEAK: src/soc/intel/apollolake/chip.c/mainboard_silicon_init_params called POST: 0x93 FSPS returned 0 POST: 0x99 ITSS IRQ Polarities Before: IPC0: 0xffffeef8 IPC1: 0xffffffff IPC2: 0xffffffff IPC3: 0x00ffffff ITSS IRQ Polarities After: IPC0: 0xffffeef8 IPC1: 0x0003ffff IPC2: 0x00000000 IPC3: 0x00000000 CPU TDP = 10 Watts CPU PL1 = 10 Watts CPU PL2 = 12 Watts BS: BS_DEV_INIT_CHIPS run times (exec / console): 74 / 55 ms POST: 0x72 Enumerating buses... Root Device scanning... CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 POST: 0x24 PCI: 00:00.0 [8086/5af0] enabled PCI: Static device PCI: 00:00.1 not found, disabling it. PCI: 00:00.2 [8086/5a8e] enabled PCI: 00:02.0 [8086/5a85] enabled PCI: 00:0d.0 [8086/5a92] enabled PCI: 00:0d.1 [8086/5a94] enabled PCI: 00:0d.2 [8086/5a96] enabled PCI: 00:0d.3 [8086/5aec] enabled PCI: 00:0e.0 [8086/5a98] enabled PCI: 00:0f.0 [8086/5a9a] enabled PCI: 00:0f.1 [8086/5a9c] enabled PCI: 00:0f.2 [8086/5a9e] enabled PCI: 00:11.0 [8086/5aa2] enabled PCI: 00:12.0 [8086/5ae3] enabled PCI: 00:13.0 subordinate bus PCI Express PCI: 00:13.0 [8086/5ad8] enabled PCI: 00:13.1 subordinate bus PCI Express PCI: 00:13.1 [8086/5ad9] enabled PCI: 00:13.2 subordinate bus PCI Express PCI: 00:13.2 [8086/5ada] enabled PCI: 00:13.3 subordinate bus PCI Express PCI: 00:13.3 [8086/5adb] enabled PCI: 00:14.0 subordinate bus PCI Express PCI: 00:14.0 [8086/5ad6] enabled PCI: 00:15.0 [8086/5aa8] enabled PCI: 00:16.0 [8086/5aac] enabled PCI: 00:16.1 [8086/5aae] enabled PCI: 00:16.2 [8086/5ab0] enabled PCI: 00:16.3 [8086/5ab2] enabled PCI: 00:18.0 [8086/5abc] enabled PCI: 00:18.1 [8086/5abe] enabled PCI: 00:18.2 [8086/5ac0] enabled PCI: 00:18.3 [8086/5aee] enabled PCI: 00:19.0 [8086/5ac2] enabled PCI: 00:19.1 [8086/5ac4] enabled PCI: 00:19.2 [8086/5ac6] enabled PCI: Static device PCI: 00:1a.0 not found, disabling it. PCI: 00:1e.0 [8086/5ad0] enabled PCI: 00:1f.0 [8086/5ae8] enabled PCI: 00:1f.1 [8086/5ad4] enabled POST: 0x25 PCI: Leftover static devices: PCI: 00:00.1 PCI: 00:03.0 PCI: 00:14.1 PCI: 00:15.1 PCI: 00:17.0 PCI: 00:17.1 PCI: 00:17.2 PCI: 00:17.3 PCI: 00:1a.0 PCI: 00:1b.0 PCI: 00:1c.0 PCI: Check your devicetree.cb. PCI: 00:02.0 scanning... scan_bus: bus PCI: 00:02.0 finished in 0 msecs PCI: 00:0d.1 scanning... scan_bus: bus PCI: 00:0d.1 finished in 0 msecs PCI: 00:0d.2 scanning... scan_bus: bus PCI: 00:0d.2 finished in 0 msecs PCI: 00:0e.0 scanning... scan_bus: bus PCI: 00:0e.0 finished in 0 msecs PCI: 00:13.0 scanning... PCI: pci_scan_bus for bus 01 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:13.0 finished in 6 msecs PCI: 00:13.1 scanning... PCI: pci_scan_bus for bus 02 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:13.1 finished in 6 msecs PCI: 00:13.2 scanning... PCI: pci_scan_bus for bus 03 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:13.2 finished in 6 msecs PCI: 00:13.3 scanning... PCI: pci_scan_bus for bus 04 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:13.3 finished in 6 msecs PCI: 00:14.0 scanning... PCI: pci_scan_bus for bus 05 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:14.0 finished in 6 msecs PCI: 00:15.0 scanning... scan_bus: bus PCI: 00:15.0 finished in 0 msecs PCI: 00:16.0 scanning... scan_bus: bus PCI: 00:16.0 finished in 0 msecs PCI: 00:16.1 scanning... scan_bus: bus PCI: 00:16.1 finished in 0 msecs PCI: 00:16.2 scanning... scan_bus: bus PCI: 00:16.2 finished in 0 msecs PCI: 00:16.3 scanning... scan_bus: bus PCI: 00:16.3 finished in 0 msecs PCI: 00:19.0 scanning... scan_bus: bus PCI: 00:19.0 finished in 0 msecs PCI: 00:19.1 scanning... scan_bus: bus PCI: 00:19.1 finished in 0 msecs PCI: 00:19.2 scanning... scan_bus: bus PCI: 00:19.2 finished in 0 msecs PCI: 00:1f.0 scanning... scan_bus: bus PCI: 00:1f.0 finished in 0 msecs PCI: 00:1f.1 scanning... scan_bus: bus PCI: 00:1f.1 finished in 0 msecs POST: 0x55 scan_bus: bus DOMAIN: 0000 finished in 339 msecs scan_bus: bus Root Device finished in 351 msecs done BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 361 ms FMAP: area UNIFIED_MRC_CACHE found @ 301000 (135168 bytes) MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'. BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 11 ms POST: 0x73 found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Done reading resources. ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) === === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) === DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff update_constraints: PCI: 00:0d.1 20 base 00000400 limit 000004ff io (fixed) update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed) update_constraints: PCI: 00:1f.1 20 base 0000efa0 limit 0000efbf io (fixed) DOMAIN: 0000: Resource ranges: * Base: 1000, Size: dfa0, Tag: 100 * Base: efc0, Size: 1040, Tag: 100 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io PCI: 00:12.0 20 * [0x1040 - 0x105f] limit: 105f io PCI: 00:12.0 18 * [0x1060 - 0x1067] limit: 1067 io PCI: 00:12.0 1c * [0x1068 - 0x106b] limit: 106b io DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed) update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed) update_constraints: PCI: 00:00.0 02 base fed64000 limit fed64fff mem (fixed) update_constraints: PCI: 00:00.0 03 base fed65000 limit fed65fff mem (fixed) update_constraints: PCI: 00:00.0 04 base 00000000 limit 0009ffff mem (fixed) update_constraints: PCI: 00:00.0 05 base 000c0000 limit 7affffff mem (fixed) update_constraints: PCI: 00:00.0 06 base 7b000000 limit 7fffffff mem (fixed) update_constraints: PCI: 00:00.0 07 base 100000000 limit 17fffffff mem (fixed) update_constraints: PCI: 00:00.0 08 base 000a0000 limit 000bffff mem (fixed) update_constraints: PCI: 00:00.0 09 base 000c0000 limit 000fffff mem (fixed) update_constraints: PCI: 00:00.0 0a base 11800000 limit 11bfffff mem (fixed) update_constraints: PCI: 00:00.0 0b base 11000000 limit 117fffff mem (fixed) update_constraints: PCI: 00:00.0 0c base 12000000 limit 120fffff mem (fixed) update_constraints: PCI: 00:00.0 0d base 12150000 limit 12150fff mem (fixed) update_constraints: PCI: 00:00.0 0e base 12140000 limit 1214ffff mem (fixed) update_constraints: PCI: 00:00.0 0f base 10000000 limit 10ffffff mem (fixed) update_constraints: PCI: 00:00.0 10 base 11c00000 limit 11ffffff mem (fixed) update_constraints: PCI: 00:00.0 11 base 12100000 limit 1213ffff mem (fixed) update_constraints: PCI: 00:0d.0 10 base d0000000 limit d0ffffff mem (fixed) update_constraints: PCI: 00:0d.1 10 base fe042000 limit fe043fff mem (fixed) update_constraints: PCI: 00:0d.3 10 base fe900000 limit fe901fff mem (fixed) update_constraints: PCI: 00:0d.3 18 base fe902000 limit fe902fff mem (fixed) update_constraints: PCI: 00:18.2 10 base ddffc000 limit ddffcfff mem (fixed) DOMAIN: 0000: Resource ranges: * Base: 80000000, Size: 50000000, Tag: 200 * Base: d1000000, Size: cffc000, Tag: 200 * Base: ddffd000, Size: 2003000, Tag: 200 * Base: f0000000, Size: e042000, Tag: 200 * Base: fe044000, Size: 8bc000, Tag: 200 * Base: fe903000, Size: 40d000, Tag: 200 * Base: fed18000, Size: 4c000, Tag: 200 * Base: fed66000, Size: 129a000, Tag: 200 * Base: 180000000, Size: 7e80000000, Tag: 100200 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem PCI: 00:00.2 18 * [0x91000000 - 0x917fffff] limit: 917fffff mem PCI: 00:00.2 10 * [0x91800000 - 0x918fffff] limit: 918fffff mem PCI: 00:0e.0 20 * [0x91900000 - 0x919fffff] limit: 919fffff mem PCI: 00:15.0 10 * [0x91a00000 - 0x91a0ffff] limit: 91a0ffff mem PCI: 00:0e.0 10 * [0x91a10000 - 0x91a13fff] limit: 91a13fff mem PCI: 00:11.0 10 * [0x91a14000 - 0x91a15fff] limit: 91a15fff mem PCI: 00:12.0 10 * [0x91a16000 - 0x91a17fff] limit: 91a17fff mem PCI: 00:0d.1 18 * [0x91a18000 - 0x91a18fff] limit: 91a18fff mem PCI: 00:0d.2 10 * [0x91a19000 - 0x91a19fff] limit: 91a19fff mem PCI: 00:0f.0 10 * [0x91a1a000 - 0x91a1afff] limit: 91a1afff mem PCI: 00:0f.1 10 * [0x91a1b000 - 0x91a1bfff] limit: 91a1bfff mem PCI: 00:0f.2 10 * [0x91a1c000 - 0x91a1cfff] limit: 91a1cfff mem PCI: 00:11.0 18 * [0x91a1d000 - 0x91a1dfff] limit: 91a1dfff mem PCI: 00:16.0 10 * [0x91a1e000 - 0x91a1efff] limit: 91a1efff mem PCI: 00:16.0 18 * [0x91a1f000 - 0x91a1ffff] limit: 91a1ffff mem PCI: 00:16.1 10 * [0x91a20000 - 0x91a20fff] limit: 91a20fff mem PCI: 00:16.1 18 * [0x91a21000 - 0x91a21fff] limit: 91a21fff mem PCI: 00:16.2 10 * [0x91a22000 - 0x91a22fff] limit: 91a22fff mem PCI: 00:16.2 18 * [0x91a23000 - 0x91a23fff] limit: 91a23fff mem PCI: 00:16.3 10 * [0x91a24000 - 0x91a24fff] limit: 91a24fff mem PCI: 00:16.3 18 * [0x91a25000 - 0x91a25fff] limit: 91a25fff mem PCI: 00:18.0 10 * [0x91a26000 - 0x91a26fff] limit: 91a26fff mem PCI: 00:18.0 18 * [0x91a27000 - 0x91a27fff] limit: 91a27fff mem PCI: 00:18.1 10 * [0x91a28000 - 0x91a28fff] limit: 91a28fff mem PCI: 00:18.1 18 * [0x91a29000 - 0x91a29fff] limit: 91a29fff mem PCI: 00:18.2 18 * [0x91a2a000 - 0x91a2afff] limit: 91a2afff mem PCI: 00:18.3 10 * [0x91a2b000 - 0x91a2bfff] limit: 91a2bfff mem PCI: 00:18.3 18 * [0x91a2c000 - 0x91a2cfff] limit: 91a2cfff mem PCI: 00:19.0 10 * [0x91a2d000 - 0x91a2dfff] limit: 91a2dfff mem PCI: 00:19.0 18 * [0x91a2e000 - 0x91a2efff] limit: 91a2efff mem PCI: 00:19.1 10 * [0x91a2f000 - 0x91a2ffff] limit: 91a2ffff mem PCI: 00:19.1 18 * [0x91a30000 - 0x91a30fff] limit: 91a30fff mem PCI: 00:19.2 10 * [0x91a31000 - 0x91a31fff] limit: 91a31fff mem PCI: 00:19.2 18 * [0x91a32000 - 0x91a32fff] limit: 91a32fff mem PCI: 00:1e.0 10 * [0x91a33000 - 0x91a33fff] limit: 91a33fff mem PCI: 00:1e.0 18 * [0x91a34000 - 0x91a34fff] limit: 91a34fff mem PCI: 00:12.0 24 * [0x91a35000 - 0x91a357ff] limit: 91a357ff mem PCI: 00:00.2 20 * [0x91a36000 - 0x91a361ff] limit: 91a361ff mem PCI: 00:12.0 14 * [0x91a37000 - 0x91a370ff] limit: 91a370ff mem PCI: 00:1f.1 10 * [0x91a38000 - 0x91a380ff] limit: 91a380ff mem DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done === Resource allocator: DOMAIN: 0000 - resource allocation complete === PCI: 00:00.2 10 <- [0x0091800000 - 0x00918fffff] size 0x00100000 gran 0x14 mem64 PCI: 00:00.2 18 <- [0x0091000000 - 0x00917fffff] size 0x00800000 gran 0x17 mem64 PCI: 00:00.2 20 <- [0x0091a36000 - 0x0091a361ff] size 0x00000200 gran 0x09 mem64 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io PCI: 00:0d.1 18 <- [0x0091a18000 - 0x0091a18fff] size 0x00001000 gran 0x0c mem64 PCI: 00:0d.2 10 <- [0x0091a19000 - 0x0091a19fff] size 0x00001000 gran 0x0c mem PCI: 00:0e.0 10 <- [0x0091a10000 - 0x0091a13fff] size 0x00004000 gran 0x0e mem64 PCI: 00:0e.0 20 <- [0x0091900000 - 0x00919fffff] size 0x00100000 gran 0x14 mem64 PCI: 00:0f.0 10 <- [0x0091a1a000 - 0x0091a1afff] size 0x00001000 gran 0x0c mem64 PCI: 00:0f.1 10 <- [0x0091a1b000 - 0x0091a1bfff] size 0x00001000 gran 0x0c mem64 PCI: 00:0f.2 10 <- [0x0091a1c000 - 0x0091a1cfff] size 0x00001000 gran 0x0c mem64 PCI: 00:11.0 10 <- [0x0091a14000 - 0x0091a15fff] size 0x00002000 gran 0x0d mem64 PCI: 00:11.0 18 <- [0x0091a1d000 - 0x0091a1dfff] size 0x00001000 gran 0x0c mem64 PCI: 00:12.0 10 <- [0x0091a16000 - 0x0091a17fff] size 0x00002000 gran 0x0d mem PCI: 00:12.0 14 <- [0x0091a37000 - 0x0091a370ff] size 0x00000100 gran 0x08 mem PCI: 00:12.0 18 <- [0x0000001060 - 0x0000001067] size 0x00000008 gran 0x03 io PCI: 00:12.0 1c <- [0x0000001068 - 0x000000106b] size 0x00000004 gran 0x02 io PCI: 00:12.0 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io PCI: 00:12.0 24 <- [0x0091a35000 - 0x0091a357ff] size 0x00000800 gran 0x0b mem PCI: 00:13.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:13.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:13.0 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 01 mem PCI: 00:13.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:13.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:13.1 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 02 mem PCI: 00:13.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io PCI: 00:13.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 00:13.2 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 03 mem PCI: 00:13.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io PCI: 00:13.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 04 prefmem PCI: 00:13.3 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 04 mem PCI: 00:14.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io PCI: 00:14.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 05 prefmem PCI: 00:14.0 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 05 mem PCI: 00:15.0 10 <- [0x0091a00000 - 0x0091a0ffff] size 0x00010000 gran 0x10 mem64 PCI: 00:16.0 10 <- [0x0091a1e000 - 0x0091a1efff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.0 18 <- [0x0091a1f000 - 0x0091a1ffff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.1 10 <- [0x0091a20000 - 0x0091a20fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.1 18 <- [0x0091a21000 - 0x0091a21fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.2 10 <- [0x0091a22000 - 0x0091a22fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.2 18 <- [0x0091a23000 - 0x0091a23fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.3 10 <- [0x0091a24000 - 0x0091a24fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.3 18 <- [0x0091a25000 - 0x0091a25fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.0 10 <- [0x0091a26000 - 0x0091a26fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.0 18 <- [0x0091a27000 - 0x0091a27fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.1 10 <- [0x0091a28000 - 0x0091a28fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.1 18 <- [0x0091a29000 - 0x0091a29fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.2 18 <- [0x0091a2a000 - 0x0091a2afff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.3 10 <- [0x0091a2b000 - 0x0091a2bfff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.3 18 <- [0x0091a2c000 - 0x0091a2cfff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.0 10 <- [0x0091a2d000 - 0x0091a2dfff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.0 18 <- [0x0091a2e000 - 0x0091a2efff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.1 10 <- [0x0091a2f000 - 0x0091a2ffff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.1 18 <- [0x0091a30000 - 0x0091a30fff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.2 10 <- [0x0091a31000 - 0x0091a31fff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.2 18 <- [0x0091a32000 - 0x0091a32fff] size 0x00001000 gran 0x0c mem64 PCI: 00:1e.0 10 <- [0x0091a33000 - 0x0091a33fff] size 0x00001000 gran 0x0c mem64 PCI: 00:1e.0 18 <- [0x0091a34000 - 0x0091a34fff] size 0x00001000 gran 0x0c mem64 PCI: 00:1f.1 10 <- [0x0091a38000 - 0x0091a380ff] size 0x00000100 gran 0x08 mem64 Done setting resources. Done allocating resources. BS: BS_DEV_RESOURCES run times (exec / console): 2 / 1132 ms POST: 0x94 POST: 0x94 BS: BS_DEV_ENABLE entry times (exec / console): 0 / 2 ms POST: 0x74 Enabling resources... PCI: 00:00.0 subsystem <- 8086/5af0 PCI: 00:00.0 cmd <- 07 PCI: 00:00.2 subsystem <- 8086/5a8e PCI: 00:00.2 cmd <- 06 PCI: 00:02.0 subsystem <- 8086/5a85 PCI: 00:02.0 cmd <- 03 PCI: 00:0d.1 subsystem <- 8086/5a94 PCI: 00:0d.1 cmd <- 07 PCI: 00:0d.2 subsystem <- 8086/5a96 PCI: 00:0d.2 cmd <- 406 PCI: 00:0d.3 subsystem <- 8086/5aec PCI: 00:0d.3 cmd <- 06 PCI: 00:0e.0 subsystem <- 8086/5a98 PCI: 00:0e.0 cmd <- 02 PCI: 00:0f.0 subsystem <- 8086/5a9a PCI: 00:0f.0 cmd <- 06 PCI: 00:0f.1 subsystem <- 8086/5a9c PCI: 00:0f.1 cmd <- 06 PCI: 00:0f.2 subsystem <- 8086/5a9e PCI: 00:0f.2 cmd <- 06 PCI: 00:11.0 subsystem <- 8086/5aa2 PCI: 00:11.0 cmd <- 06 PCI: 00:12.0 subsystem <- 8086/5ae3 PCI: 00:12.0 cmd <- 03 PCI: 00:13.0 bridge ctrl <- 0013 PCI: 00:13.0 cmd <- 00 PCI: 00:13.1 bridge ctrl <- 0013 PCI: 00:13.1 cmd <- 00 PCI: 00:13.2 bridge ctrl <- 0013 PCI: 00:13.2 cmd <- 00 PCI: 00:13.3 bridge ctrl <- 0013 PCI: 00:13.3 cmd <- 00 PCI: 00:14.0 bridge ctrl <- 0013 PCI: 00:14.0 cmd <- 00 PCI: 00:15.0 subsystem <- 8086/5aa8 PCI: 00:15.0 cmd <- 02 PCI: 00:16.0 subsystem <- 8086/5aac PCI: 00:16.0 cmd <- 02 PCI: 00:16.1 subsystem <- 8086/5aae PCI: 00:16.1 cmd <- 02 PCI: 00:16.2 subsystem <- 8086/5ab0 PCI: 00:16.2 cmd <- 02 PCI: 00:16.3 subsystem <- 8086/5ab2 PCI: 00:16.3 cmd <- 02 PCI: 00:18.0 subsystem <- 8086/5abc PCI: 00:18.0 cmd <- 02 PCI: 00:18.1 subsystem <- 8086/5abe PCI: 00:18.1 cmd <- 02 PCI: 00:18.2 subsystem <- 8086/5ac0 PCI: 00:18.2 cmd <- 06 PCI: 00:18.3 subsystem <- 8086/5aee PCI: 00:18.3 cmd <- 02 PCI: 00:19.0 subsystem <- 8086/5ac2 PCI: 00:19.0 cmd <- 02 PCI: 00:19.1 subsystem <- 8086/5ac4 PCI: 00:19.1 cmd <- 02 PCI: 00:19.2 subsystem <- 8086/5ac6 PCI: 00:19.2 cmd <- 02 PCI: 00:1e.0 subsystem <- 8086/5ad0 PCI: 00:1e.0 cmd <- 06 PCI: 00:1f.0 subsystem <- 8086/5ae8 PCI: 00:1f.0 cmd <- 07 PCI: 00:1f.1 subsystem <- 8086/5ad4 PCI: 00:1f.1 cmd <- 03 done. BS: BS_DEV_ENABLE run times (exec / console): 1 / 193 ms reply is too large BS: BS_DEV_INIT entry times (exec / console): 2 / 2 ms POST: 0x75 Initializing devices... POST: 0x75 CPU_CLUSTER: 0 init MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007b000000 size 0x7af40000 type 6 0x000000007b000000 - 0x0000000080000000 size 0x05000000 type 0 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0 0x0000000100000000 - 0x0000000180000000 size 0x80000000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 CPU physical address size: 39 bits MTRR: default type WB/UC MTRR counts: 6/5. MTRR: UC selected as default type. MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 MTRR: 1 base 0x000000007b000000 mask 0x0000007fff000000 type 0 MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1 MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled POST: 0x93 Setting up local APIC... apic_id: 0x00 done. Detected 4 core, 4 thread CPU. Will perform SMM setup. CBFS: Found 'cpu_microcode_blob.bin' @0xa000 size 0xbc00 in mcache @0x7abfd0ac microcode: sig=0x506c9 pf=0x1 revision=0x3c microcode: updated to revision 0x40 date=2020-02-27 CPU: Intel(R) Celeron(R) CPU J3455 @ 1.50GHz. Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170 Processing 16 relocs. Offset value of 0x00030000 Attempting to start 3 APs Waiting for 10ms after sending INIT. Waiting for 1st SIPI to complete...AP: slot 2 apic_id 4, MCU rev: 0x0000003c done. Waiting for 2nd SIPI to complete...done. AP: slot 1 apic_id 6, MCU rev: 0x0000003c AP: slot 3 apic_id 2, MCU rev: 0x00000040 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0 Processing 11 relocs. Offset value of 0x00038000 SMM Module: stub loaded at 0x00038000. Will call 0x7aba0383 Installing permanent SMM handler to 0x7b000000 Loading module at 0x7b010000 with entry 0x7b010a5d. filesize: 0x2670 memsize: 0x6760 Processing 164 relocs. Offset value of 0x7b010000 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1a0 memsize: 0x1a0 Processing 11 relocs. Offset value of 0x7b008000 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a5d Clearing SMI status registers WAK smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3 Relocation complete. Initializing CPU #0 CPU: vendor Intel device 506c9 CPU: family 06, model 5c, stepping 09 CPU #0 initialized Initializing CPU #2 Initializing CPU #3 Initializing CPU #1 CPU: vendor Intel device 506c9 CPU: family 06, model 5c, stepping 09 CPU: vendor Intel device 506c9 CPU: family 06, model 5c, stepping 09 CPU: vendor Intel device 506c9 CPU #2 initialized CPU #1 initialized CPU: family 06, model 5c, stepping 09 CPU #3 initialized bsp_do_flight_plan done after 167 msecs. Enabling SMIs. MTRR: TEMPORARY Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007b000000 size 0x7af40000 type 6 0x000000007b000000 - 0x00000000ff800000 size 0x84800000 type 0 0x00000000ff800000 - 0x0000000100000000 size 0x00800000 type 5 0x0000000100000000 - 0x0000000180000000 size 0x80000000 type 6 MTRR: default type WB/UC MTRR counts: 11/5. MTRR: UC selected as default type. MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 MTRR: 1 base 0x000000007b000000 mask 0x0000007fff000000 type 0 MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0 MTRR: 3 base 0x00000000ff800000 mask 0x0000007fff800000 type 5 MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6 CPU_CLUSTER: 0 init finished in 479 msecs POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 PCI: 00:00.0 init PCI: 00:00.0 init finished in 0 msecs POST: 0x75 PCI: 00:00.2 init PCI: 00:00.2 init finished in 0 msecs POST: 0x75 PCI: 00:02.0 init CBFS: 'vbt.bin' not found. CBFS: 'pci8086,5a85.rom' not found. GMA: VBT couldn't be found CBFS: 'pci8086,5a85.rom' not found. PCI: 00:02.0 init finished in 12 msecs POST: 0x75 POST: 0x75 PCI: 00:0d.1 init PMC: Using default GPE route. apm_control: Disabling ACPI. APMC done. SLP S3 assertion width: 2000000 usecs Set power on after power failure. PCI: 00:0d.1 init finished in 14 msecs POST: 0x75 POST: 0x75 PCI: 00:0d.3 init PCI: 00:0d.3 init finished in 0 msecs POST: 0x75 POST: 0x75 PCI: 00:0f.0 init PCI: 00:0f.0 init finished in 0 msecs POST: 0x75 PCI: 00:0f.1 init PCI: 00:0f.1 init finished in 0 msecs POST: 0x75 PCI: 00:0f.2 init PCI: 00:0f.2 init finished in 0 msecs POST: 0x75 PCI: 00:11.0 init PCI: 00:11.0 init finished in 0 msecs POST: 0x75 PCI: 00:12.0 init PCI: 00:12.0 init finished in 0 msecs POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 PCI: 00:15.0 init PCI: 00:15.0 init finished in 0 msecs POST: 0x75 PCI: 00:16.0 init I2C bus 0 version 0x3132312a DW I2C bus 0 at 0x91a1e000 (400 KHz) PCI: 00:16.0 init finished in 6 msecs POST: 0x75 PCI: 00:16.1 init I2C bus 1 version 0x3132312a DW I2C bus 1 at 0x91a20000 (400 KHz) PCI: 00:16.1 init finished in 6 msecs POST: 0x75 PCI: 00:16.2 init I2C bus 2 version 0x3132312a DW I2C bus 2 at 0x91a22000 (400 KHz) PCI: 00:16.2 init finished in 6 msecs POST: 0x75 PCI: 00:16.3 init I2C bus 3 version 0x3132312a DW I2C bus 3 at 0x91a24000 (400 KHz) PCI: 00:16.3 init finished in 6 msecs POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 PCI: 00:1e.0 init PCI: 00:1e.0 init finished in 0 msecs POST: 0x75 PCI: 00:1f.0 init RTC Init RTC: Clear requested zeroing cmos PCI: 00:1f.0 init finished in 10 msecs POST: 0x75 PCI: 00:1f.1 init PCI: 00:1f.1 init finished in 0 msecs Devices initialized BS: BS_DEV_INIT run times (exec / console): 100 / 603 ms ME: Version: Unavailable BS: BS_DEV_INIT exit times (exec / console): 1 / 3 ms POST: 0x76 Finalize devices... Devices finalized BS: BS_POST_DEVICE run times (exec / console): 0 / 5 ms POST: 0x77 BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 1 ms POST: 0x79 POST: 0x9c CBFS: Found 'fallback/dsdt.aml' @0x2c5c0 size 0x1c00 in mcache @0x7abfd1c8 CBFS: 'fallback/slic' not found. ACPI: Writing ACPI tables at 7ab22000. ACPI: * FACS ACPI: * DSDT PCI space above 4GB MMIO is at 0x180000000, len = 0x7e80000000 ACPI: * FADT SCI is IRQ9 ACPI: added table 1/32, length now 40 ACPI: * SSDT Found 1 CPU(s) with 4/4 physical/logical core(s) each. Turbo is available and visible PSS: 1501MHz power 10000 control 0x1700 status 0x1700 PSS: 1500MHz power 10000 control 0xf00 status 0xf00 PSS: 1400MHz power 9218 control 0xe00 status 0xe00 PSS: 1200MHz power 7728 control 0xc00 status 0xc00 PSS: 1000MHz power 6280 control 0xa00 status 0xa00 PSS: 800MHz power 4908 control 0x800 status 0x800 PSS: 1501MHz power 10000 control 0x1700 status 0x1700 PSS: 1500MHz power 10000 control 0xf00 status 0xf00 PSS: 1400MHz power 9218 control 0xe00 status 0xe00 PSS: 1200MHz power 7728 control 0xc00 status 0xc00 PSS: 1000MHz power 6280 control 0xa00 status 0xa00 PSS: 800MHz power 4908 control 0x800 status 0x800 PSS: 1501MHz power 10000 control 0x1700 status 0x1700 PSS: 1500MHz power 10000 control 0xf00 status 0xf00 PSS: 1400MHz power 9218 control 0xe00 status 0xe00 PSS: 1200MHz power 7728 control 0xc00 status 0xc00 PSS: 1000MHz power 6280 control 0xa00 status 0xa00 PSS: 800MHz power 4908 control 0x800 status 0x800 PSS: 1501MHz power 10000 control 0x1700 status 0x1700 PSS: 1500MHz power 10000 control 0xf00 status 0xf00 PSS: 1400MHz power 9218 control 0xe00 status 0xe00 PSS: 1200MHz power 7728 control 0xc00 status 0xc00 PSS: 1000MHz power 6280 control 0xa00 status 0xa00 PSS: 800MHz power 4908 control 0x800 status 0x800 ACPI: added table 2/32, length now 44 ACPI: * MCFG ACPI: added table 3/32, length now 48 ACPI: * MADT SCI is IRQ9 ACPI: added table 4/32, length now 52 current = 7ab24950 ACPI: * DMAR ACPI: added table 5/32, length now 56 ACPI: added table 6/32, length now 60 ACPI: * HPET ACPI: added table 7/32, length now 64 ACPI: done. ACPI tables: 10896 bytes. smbios_write_tables: 7ab21000 SMBIOS firmware version is set to coreboot_version: '4.13-3184-ga0c7f34302' SMBIOS tables: 605 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 252a Writing coreboot table at 0x7ab46000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-000000000fffffff: RAM 4. 0000000010000000-0000000012150fff: RESERVED 5. 0000000012151000-000000007ab20fff: RAM 6. 000000007ab21000-000000007ab89fff: CONFIGURATION TABLES 7. 000000007ab8a000-000000007abcffff: RAMSTAGE 8. 000000007abd0000-000000007affffff: CONFIGURATION TABLES 9. 000000007b000000-000000007fffffff: RESERVED 10. 00000000d0000000-00000000d0ffffff: RESERVED 11. 00000000e0000000-00000000efffffff: RESERVED 12. 00000000fe042000-00000000fe043fff: RESERVED 13. 00000000fed10000-00000000fed17fff: RESERVED 14. 00000000fed64000-00000000fed65fff: RESERVED 15. 0000000100000000-000000017fffffff: RAM SF: Detected 00 0000 with sector size 0x1000, total 0x1000000 Wrote coreboot table at: 0x7ab46000, 0x44c bytes, checksum 3ea0 coreboot table: 1124 bytes. IMD ROOT 0. 0x7afff000 0x00001000 IMD SMALL 1. 0x7affe000 0x00001000 FSP MEMORY 2. 0x7abfe000 0x00400000 RO MCACHE 3. 0x7abfd000 0x00000354 CONSOLE 4. 0x7abdd000 0x00020000 TIME STAMP 5. 0x7abdc000 0x00000910 ROMSTG STCK 6. 0x7abdb000 0x00001000 AFTER CAR 7. 0x7abd0000 0x0000b000 RAMSTAGE 8. 0x7ab89000 0x00047000 REFCODE 9. 0x7ab5e000 0x0002b000 SMM BACKUP 10. 0x7ab4e000 0x00010000 COREBOOT 11. 0x7ab46000 0x00008000 ACPI 12. 0x7ab22000 0x00024000 SMBIOS 13. 0x7ab21000 0x00000800 IMD small region: IMD ROOT 0. 0x7affec00 0x00000400 FSP RUNTIME 1. 0x7affebe0 0x00000004 FMAP 2. 0x7affe920 0x000002ae POWER STATE 3. 0x7affe8e0 0x00000040 ROMSTAGE 4. 0x7affe8c0 0x00000004 ACPI GNVS 5. 0x7affe7c0 0x00000100 BS: BS_WRITE_TABLES run times (exec / console): 1 / 401 ms POST: 0x7a CBFS: Found 'fallback/payload' @0xb8340 size 0xb7c82 in mcache @0x7abfd2c4 Checking segment from ROM address 0xffcfb36c Checking segment from ROM address 0xffcfb388 Loading segment from ROM address 0xffcfb36c code (compression=1) New segment dstaddr 0x00800000 memsize 0x800000 srcaddr 0xffcfb3a4 filesize 0xb7c4a Loading Segment: addr: 0x00800000 memsz: 0x0000000000800000 filesz: 0x00000000000b7c4a using LZMA Loading segment from ROM address 0xffcfb388 Entry Point 0x00803120 BS: BS_PAYLOAD_LOAD run times (exec / console): 234 / 49 ms POST: 0x95 POST: 0x95 POST: 0x88 POST: 0x89 CSE FWSTS1: 0x80003042 CSE FWSTS2: 0x30220000 CSE FWSTS3: 0x00000000 CSE FWSTS4: 0x00080004 CSE FWSTS5: 0x00000000 CSE FWSTS6: 0x40000000 ME: Manufacturing Mode : NO ME: FPF status : unknown BUG: check_xdci_enable requests hidden 00:15.1 BS: BS_PAYLOAD_LOAD exit times (exec / console): 6 / 31 ms POST: 0x7b mp_park_aps done after 0 msecs. Jumping to boot code at 0x00803120(0x7ab46000) POST: 0xf8 [=3h[=3hBooting from 'USB: Synology DiskStation ' failed; verify it contains a 64-bit UEFI OS. Press any key to continue booting... probing: pc0 mem[636K 254M 1673M 2042M 240K 1M 48K 1M 20K 112K 40K 88K 48K 1M] disk: hd0 hd1* >> OpenBSD/amd64 BOOTX64 3.57 |/-\|/-\|/boot> -\|/-cannot open hd0a:/etc/random.seed: No such file or directory booting hd0a:/6.9/amd64/bsd.rd: \|/-\|/-\3818189|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-+1590272\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\+3878376|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|+0/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/+704512-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/- [109\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\+288+28]=0x989530 |/-\|entry point at 0x1001000 FMAP: Found "FLASH" version 1.1 at 0x300000. FMAP: base = 0x0 size = 0x1000000 #areas = 15 FMAP: area COREBOOT found @ 342000 (3657728 bytes) FMAP: area COREBOOT found @ 342000 (3657728 bytes) CBFS: mcache @0xfef04e00 built for 15 files, used 0x354 of 0x2000 bytes CBFS: Found 'fallback/romstage' @0x80 size 0x9ed8 in mcache @0xfef04e2c BS: bootblock times (exec / console): total (unknown) / 43 ms coreboot-4.13-3184-ga0c7f34302 Wed Apr 14 12:18:58 UTC 2021 romstage starting (log level: 7)... CPU: Intel(R) Celeron(R) CPU J3455 @ 1.50GHz CPU: ID 506c9, Apollolake B0, ucode: 0000003c CPU: AES Supported, TXT Not Supported, VT Supported MCH: device id 5af0 (rev 0b) is Apollolake PCH: device id 5ae8 (rev 0b) is Apollolake IGD: device id 5a85 (rev 0b) is Apollolake HD 500 pm1_sts: 0000 pm1_en: 0100 pm1_cnt: 00000000 gpe0_sts[0]: 00000000 gpe0_en[0]: 00008000 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000 prsts: 00000000 tco_sts: 0000 0000 gen_pmcon1: 02004000 gen_pmcon2: 00003a00 gen_pmcon3: 00000c00 prev_sleep_state 0 FMAP: area COREBOOT found @ 342000 (3657728 bytes) FMAP: area COREBOOT found @ 342000 (3657728 bytes) CBFS: Found 'fspm.bin' @0x2e200 size 0x59000 in mcache @0xfef04ff4 POST: 0x34 FMAP: area RW_MRC_CACHE found @ 311000 (65536 bytes) FMAP: area RW_VAR_MRC_CACHE found @ 321000 (4096 bytes) POST: 0x36 POST: 0x92 POST: 0x98 CBMEM: IMD: root @ 0x7afff000 254 entries. IMD: root @ 0x7affec00 62 entries. External stage cache: IMD: root @ 0x7b7ff000 254 entries. IMD: root @ 0x7b7fec00 62 entries. FMAP: area RW_MRC_CACHE found @ 311000 (65536 bytes) MRC: Checking cached data update for 'RW_MRC_CACHE'. SF: Detected 00 0000 with sector size 0x1000, total 0x1000000 MRC: 'RW_MRC_CACHE' does not need update. CPU: frequency set to 2300 MHz FMAP: area RW_VAR_MRC_CACHE found @ 321000 (4096 bytes) MRC: Checking cached data update for 'RW_VAR_MRC_CACHE'. MRC: 'RW_VAR_MRC_CACHE' does not need update. WEAK: src/soc/intel/apollolake/romstage.c/mainboard_save_dimm_info called SMM Memory Map SMRAM : 0x7b000000 0x800000 Subregion 0: 0x7b000000 0x700000 Subregion 1: 0x7b700000 0x100000 Subregion 2: 0x7b800000 0x0 top_of_ram = 0x7b000000 MTRR Range: Start=7a000000 End=7b000000 (Size 1000000) MTRR Range: Start=7b000000 End=7b800000 (Size 800000) MTRR Range: Start=ff000000 End=0 (Size 1000000) Normal boot CBFS: Found 'fallback/postcar' @0xb3000 size 0x52c0 in mcache @0xfef05080 Loading module at 0x7abd1000 with entry 0x7abd1031. filesize: 0x4f50 memsize: 0x92b8 Processing 204 relocs. Offset value of 0x78bd1000 BS: romstage times (exec / console): total (unknown) / 223 ms coreboot-4.13-3184-ga0c7f34302 Wed Apr 14 12:18:58 UTC 2021 postcar starting (log level: 7)... Normal boot FMAP: area COREBOOT found @ 342000 (3657728 bytes) FMAP: area COREBOOT found @ 342000 (3657728 bytes) CBFS: Found 'fallback/ramstage' @0x15cc0 size 0x16302 in mcache @0x7abfd10c Loading module at 0x7ab8a000 with entry 0x7ab8a000. filesize: 0x301d0 memsize: 0x45570 Processing 3099 relocs. Offset value of 0x79d8a000 BS: postcar times (exec / console): total (unknown) / 42 ms coreboot-4.13-3184-ga0c7f34302 Wed Apr 14 12:18:58 UTC 2021 ramstage starting (log level: 7)... POST: 0x39 POST: 0x80 Normal boot ACPI _SWS is PM1 Index -1 GPE Index -1 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms POST: 0x70 BS: BS_PRE_DEVICE run times (exec / console): 0 / 1 ms POST: 0x71 FMAP: area COREBOOT found @ 342000 (3657728 bytes) FMAP: area COREBOOT found @ 342000 (3657728 bytes) CBFS: Found 'fsps.bin' @0x87fc0 size 0x2b000 in mcache @0x7abfd240 WEAK: src/soc/intel/apollolake/chip.c/mainboard_silicon_init_params called POST: 0x93 FSPS returned 0 POST: 0x99 ITSS IRQ Polarities Before: IPC0: 0xffffeef8 IPC1: 0xffffffff IPC2: 0xffffffff IPC3: 0x00ffffff ITSS IRQ Polarities After: IPC0: 0xffffeef8 IPC1: 0x0003ffff IPC2: 0x00000000 IPC3: 0x00000000 CPU TDP = 10 Watts CPU PL1 = 10 Watts CPU PL2 = 12 Watts BS: BS_DEV_INIT_CHIPS run times (exec / console): 72 / 55 ms POST: 0x72 Enumerating buses... Root Device scanning... CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 POST: 0x24 PCI: 00:00.0 [8086/5af0] enabled PCI: Static device PCI: 00:00.1 not found, disabling it. PCI: 00:00.2 [8086/5a8e] enabled PCI: 00:02.0 [8086/5a85] enabled PCI: 00:0d.0 [8086/5a92] enabled PCI: 00:0d.1 [8086/5a94] enabled PCI: 00:0d.2 [8086/5a96] enabled PCI: 00:0d.3 [8086/5aec] enabled PCI: 00:0e.0 [8086/5a98] enabled PCI: 00:0f.0 [8086/5a9a] enabled PCI: 00:0f.1 [8086/5a9c] enabled PCI: 00:0f.2 [8086/5a9e] enabled PCI: 00:11.0 [8086/5aa2] enabled PCI: 00:12.0 [8086/5ae3] enabled PCI: 00:13.0 subordinate bus PCI Express PCI: 00:13.0 [8086/5ad8] enabled PCI: 00:13.1 subordinate bus PCI Express PCI: 00:13.1 [8086/5ad9] enabled PCI: 00:13.2 subordinate bus PCI Express PCI: 00:13.2 [8086/5ada] enabled PCI: 00:13.3 subordinate bus PCI Express PCI: 00:13.3 [8086/5adb] enabled PCI: 00:14.0 subordinate bus PCI Express PCI: 00:14.0 [8086/5ad6] enabled PCI: 00:15.0 [8086/5aa8] enabled PCI: 00:16.0 [8086/5aac] enabled PCI: 00:16.1 [8086/5aae] enabled PCI: 00:16.2 [8086/5ab0] enabled PCI: 00:16.3 [8086/5ab2] enabled PCI: 00:18.0 [8086/5abc] enabled PCI: 00:18.1 [8086/5abe] enabled PCI: 00:18.2 [8086/5ac0] enabled PCI: 00:18.3 [8086/5aee] enabled PCI: 00:19.0 [8086/5ac2] enabled PCI: 00:19.1 [8086/5ac4] enabled PCI: 00:19.2 [8086/5ac6] enabled PCI: Static device PCI: 00:1a.0 not found, disabling it. PCI: 00:1e.0 [8086/5ad0] enabled PCI: 00:1f.0 [8086/5ae8] enabled PCI: 00:1f.1 [8086/5ad4] enabled POST: 0x25 PCI: Leftover static devices: PCI: 00:00.1 PCI: 00:03.0 PCI: 00:14.1 PCI: 00:15.1 PCI: 00:17.0 PCI: 00:17.1 PCI: 00:17.2 PCI: 00:17.3 PCI: 00:1a.0 PCI: 00:1b.0 PCI: 00:1c.0 PCI: Check your devicetree.cb. PCI: 00:02.0 scanning... scan_bus: bus PCI: 00:02.0 finished in 0 msecs PCI: 00:0d.1 scanning... scan_bus: bus PCI: 00:0d.1 finished in 0 msecs PCI: 00:0d.2 scanning... scan_bus: bus PCI: 00:0d.2 finished in 0 msecs PCI: 00:0e.0 scanning... scan_bus: bus PCI: 00:0e.0 finished in 0 msecs PCI: 00:13.0 scanning... PCI: pci_scan_bus for bus 01 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:13.0 finished in 6 msecs PCI: 00:13.1 scanning... PCI: pci_scan_bus for bus 02 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:13.1 finished in 6 msecs PCI: 00:13.2 scanning... PCI: pci_scan_bus for bus 03 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:13.2 finished in 6 msecs PCI: 00:13.3 scanning... PCI: pci_scan_bus for bus 04 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:13.3 finished in 6 msecs PCI: 00:14.0 scanning... PCI: pci_scan_bus for bus 05 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:14.0 finished in 6 msecs PCI: 00:15.0 scanning... scan_bus: bus PCI: 00:15.0 finished in 0 msecs PCI: 00:16.0 scanning... scan_bus: bus PCI: 00:16.0 finished in 0 msecs PCI: 00:16.1 scanning... scan_bus: bus PCI: 00:16.1 finished in 0 msecs PCI: 00:16.2 scanning... scan_bus: bus PCI: 00:16.2 finished in 0 msecs PCI: 00:16.3 scanning... scan_bus: bus PCI: 00:16.3 finished in 0 msecs PCI: 00:19.0 scanning... scan_bus: bus PCI: 00:19.0 finished in 0 msecs PCI: 00:19.1 scanning... scan_bus: bus PCI: 00:19.1 finished in 0 msecs PCI: 00:19.2 scanning... scan_bus: bus PCI: 00:19.2 finished in 0 msecs PCI: 00:1f.0 scanning... scan_bus: bus PCI: 00:1f.0 finished in 0 msecs PCI: 00:1f.1 scanning... scan_bus: bus PCI: 00:1f.1 finished in 0 msecs POST: 0x55 scan_bus: bus DOMAIN: 0000 finished in 339 msecs scan_bus: bus Root Device finished in 351 msecs done BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 361 ms FMAP: area UNIFIED_MRC_CACHE found @ 301000 (135168 bytes) MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'. BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 11 ms POST: 0x73 found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Done reading resources. ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) === === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) === DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff update_constraints: PCI: 00:0d.1 20 base 00000400 limit 000004ff io (fixed) update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed) update_constraints: PCI: 00:1f.1 20 base 0000efa0 limit 0000efbf io (fixed) DOMAIN: 0000: Resource ranges: * Base: 1000, Size: dfa0, Tag: 100 * Base: efc0, Size: 1040, Tag: 100 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io PCI: 00:12.0 20 * [0x1040 - 0x105f] limit: 105f io PCI: 00:12.0 18 * [0x1060 - 0x1067] limit: 1067 io PCI: 00:12.0 1c * [0x1068 - 0x106b] limit: 106b io DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed) update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed) update_constraints: PCI: 00:00.0 02 base fed64000 limit fed64fff mem (fixed) update_constraints: PCI: 00:00.0 03 base fed65000 limit fed65fff mem (fixed) update_constraints: PCI: 00:00.0 04 base 00000000 limit 0009ffff mem (fixed) update_constraints: PCI: 00:00.0 05 base 000c0000 limit 7affffff mem (fixed) update_constraints: PCI: 00:00.0 06 base 7b000000 limit 7fffffff mem (fixed) update_constraints: PCI: 00:00.0 07 base 100000000 limit 17fffffff mem (fixed) update_constraints: PCI: 00:00.0 08 base 000a0000 limit 000bffff mem (fixed) update_constraints: PCI: 00:00.0 09 base 000c0000 limit 000fffff mem (fixed) update_constraints: PCI: 00:00.0 0a base 11800000 limit 11bfffff mem (fixed) update_constraints: PCI: 00:00.0 0b base 11000000 limit 117fffff mem (fixed) update_constraints: PCI: 00:00.0 0c base 12000000 limit 120fffff mem (fixed) update_constraints: PCI: 00:00.0 0d base 12150000 limit 12150fff mem (fixed) update_constraints: PCI: 00:00.0 0e base 12140000 limit 1214ffff mem (fixed) update_constraints: PCI: 00:00.0 0f base 10000000 limit 10ffffff mem (fixed) update_constraints: PCI: 00:00.0 10 base 11c00000 limit 11ffffff mem (fixed) update_constraints: PCI: 00:00.0 11 base 12100000 limit 1213ffff mem (fixed) update_constraints: PCI: 00:0d.0 10 base d0000000 limit d0ffffff mem (fixed) update_constraints: PCI: 00:0d.1 10 base fe042000 limit fe043fff mem (fixed) update_constraints: PCI: 00:0d.3 10 base fe900000 limit fe901fff mem (fixed) update_constraints: PCI: 00:0d.3 18 base fe902000 limit fe902fff mem (fixed) update_constraints: PCI: 00:18.2 10 base ddffc000 limit ddffcfff mem (fixed) DOMAIN: 0000: Resource ranges: * Base: 80000000, Size: 50000000, Tag: 200 * Base: d1000000, Size: cffc000, Tag: 200 * Base: ddffd000, Size: 2003000, Tag: 200 * Base: f0000000, Size: e042000, Tag: 200 * Base: fe044000, Size: 8bc000, Tag: 200 * Base: fe903000, Size: 40d000, Tag: 200 * Base: fed18000, Size: 4c000, Tag: 200 * Base: fed66000, Size: 129a000, Tag: 200 * Base: 180000000, Size: 7e80000000, Tag: 100200 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem PCI: 00:00.2 18 * [0x91000000 - 0x917fffff] limit: 917fffff mem PCI: 00:00.2 10 * [0x91800000 - 0x918fffff] limit: 918fffff mem PCI: 00:0e.0 20 * [0x91900000 - 0x919fffff] limit: 919fffff mem PCI: 00:15.0 10 * [0x91a00000 - 0x91a0ffff] limit: 91a0ffff mem PCI: 00:0e.0 10 * [0x91a10000 - 0x91a13fff] limit: 91a13fff mem PCI: 00:11.0 10 * [0x91a14000 - 0x91a15fff] limit: 91a15fff mem PCI: 00:12.0 10 * [0x91a16000 - 0x91a17fff] limit: 91a17fff mem PCI: 00:0d.1 18 * [0x91a18000 - 0x91a18fff] limit: 91a18fff mem PCI: 00:0d.2 10 * [0x91a19000 - 0x91a19fff] limit: 91a19fff mem PCI: 00:0f.0 10 * [0x91a1a000 - 0x91a1afff] limit: 91a1afff mem PCI: 00:0f.1 10 * [0x91a1b000 - 0x91a1bfff] limit: 91a1bfff mem PCI: 00:0f.2 10 * [0x91a1c000 - 0x91a1cfff] limit: 91a1cfff mem PCI: 00:11.0 18 * [0x91a1d000 - 0x91a1dfff] limit: 91a1dfff mem PCI: 00:16.0 10 * [0x91a1e000 - 0x91a1efff] limit: 91a1efff mem PCI: 00:16.0 18 * [0x91a1f000 - 0x91a1ffff] limit: 91a1ffff mem PCI: 00:16.1 10 * [0x91a20000 - 0x91a20fff] limit: 91a20fff mem PCI: 00:16.1 18 * [0x91a21000 - 0x91a21fff] limit: 91a21fff mem PCI: 00:16.2 10 * [0x91a22000 - 0x91a22fff] limit: 91a22fff mem PCI: 00:16.2 18 * [0x91a23000 - 0x91a23fff] limit: 91a23fff mem PCI: 00:16.3 10 * [0x91a24000 - 0x91a24fff] limit: 91a24fff mem PCI: 00:16.3 18 * [0x91a25000 - 0x91a25fff] limit: 91a25fff mem PCI: 00:18.0 10 * [0x91a26000 - 0x91a26fff] limit: 91a26fff mem PCI: 00:18.0 18 * [0x91a27000 - 0x91a27fff] limit: 91a27fff mem PCI: 00:18.1 10 * [0x91a28000 - 0x91a28fff] limit: 91a28fff mem PCI: 00:18.1 18 * [0x91a29000 - 0x91a29fff] limit: 91a29fff mem PCI: 00:18.2 18 * [0x91a2a000 - 0x91a2afff] limit: 91a2afff mem PCI: 00:18.3 10 * [0x91a2b000 - 0x91a2bfff] limit: 91a2bfff mem PCI: 00:18.3 18 * [0x91a2c000 - 0x91a2cfff] limit: 91a2cfff mem PCI: 00:19.0 10 * [0x91a2d000 - 0x91a2dfff] limit: 91a2dfff mem PCI: 00:19.0 18 * [0x91a2e000 - 0x91a2efff] limit: 91a2efff mem PCI: 00:19.1 10 * [0x91a2f000 - 0x91a2ffff] limit: 91a2ffff mem PCI: 00:19.1 18 * [0x91a30000 - 0x91a30fff] limit: 91a30fff mem PCI: 00:19.2 10 * [0x91a31000 - 0x91a31fff] limit: 91a31fff mem PCI: 00:19.2 18 * [0x91a32000 - 0x91a32fff] limit: 91a32fff mem PCI: 00:1e.0 10 * [0x91a33000 - 0x91a33fff] limit: 91a33fff mem PCI: 00:1e.0 18 * [0x91a34000 - 0x91a34fff] limit: 91a34fff mem PCI: 00:12.0 24 * [0x91a35000 - 0x91a357ff] limit: 91a357ff mem PCI: 00:00.2 20 * [0x91a36000 - 0x91a361ff] limit: 91a361ff mem PCI: 00:12.0 14 * [0x91a37000 - 0x91a370ff] limit: 91a370ff mem PCI: 00:1f.1 10 * [0x91a38000 - 0x91a380ff] limit: 91a380ff mem DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done === Resource allocator: DOMAIN: 0000 - resource allocation complete === PCI: 00:00.2 10 <- [0x0091800000 - 0x00918fffff] size 0x00100000 gran 0x14 mem64 PCI: 00:00.2 18 <- [0x0091000000 - 0x00917fffff] size 0x00800000 gran 0x17 mem64 PCI: 00:00.2 20 <- [0x0091a36000 - 0x0091a361ff] size 0x00000200 gran 0x09 mem64 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io PCI: 00:0d.1 18 <- [0x0091a18000 - 0x0091a18fff] size 0x00001000 gran 0x0c mem64 PCI: 00:0d.2 10 <- [0x0091a19000 - 0x0091a19fff] size 0x00001000 gran 0x0c mem PCI: 00:0e.0 10 <- [0x0091a10000 - 0x0091a13fff] size 0x00004000 gran 0x0e mem64 PCI: 00:0e.0 20 <- [0x0091900000 - 0x00919fffff] size 0x00100000 gran 0x14 mem64 PCI: 00:0f.0 10 <- [0x0091a1a000 - 0x0091a1afff] size 0x00001000 gran 0x0c mem64 PCI: 00:0f.1 10 <- [0x0091a1b000 - 0x0091a1bfff] size 0x00001000 gran 0x0c mem64 PCI: 00:0f.2 10 <- [0x0091a1c000 - 0x0091a1cfff] size 0x00001000 gran 0x0c mem64 PCI: 00:11.0 10 <- [0x0091a14000 - 0x0091a15fff] size 0x00002000 gran 0x0d mem64 PCI: 00:11.0 18 <- [0x0091a1d000 - 0x0091a1dfff] size 0x00001000 gran 0x0c mem64 PCI: 00:12.0 10 <- [0x0091a16000 - 0x0091a17fff] size 0x00002000 gran 0x0d mem PCI: 00:12.0 14 <- [0x0091a37000 - 0x0091a370ff] size 0x00000100 gran 0x08 mem PCI: 00:12.0 18 <- [0x0000001060 - 0x0000001067] size 0x00000008 gran 0x03 io PCI: 00:12.0 1c <- [0x0000001068 - 0x000000106b] size 0x00000004 gran 0x02 io PCI: 00:12.0 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io PCI: 00:12.0 24 <- [0x0091a35000 - 0x0091a357ff] size 0x00000800 gran 0x0b mem PCI: 00:13.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:13.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:13.0 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 01 mem PCI: 00:13.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:13.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:13.1 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 02 mem PCI: 00:13.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io PCI: 00:13.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 00:13.2 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 03 mem PCI: 00:13.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io PCI: 00:13.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 04 prefmem PCI: 00:13.3 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 04 mem PCI: 00:14.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io PCI: 00:14.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 05 prefmem PCI: 00:14.0 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 05 mem PCI: 00:15.0 10 <- [0x0091a00000 - 0x0091a0ffff] size 0x00010000 gran 0x10 mem64 PCI: 00:16.0 10 <- [0x0091a1e000 - 0x0091a1efff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.0 18 <- [0x0091a1f000 - 0x0091a1ffff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.1 10 <- [0x0091a20000 - 0x0091a20fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.1 18 <- [0x0091a21000 - 0x0091a21fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.2 10 <- [0x0091a22000 - 0x0091a22fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.2 18 <- [0x0091a23000 - 0x0091a23fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.3 10 <- [0x0091a24000 - 0x0091a24fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.3 18 <- [0x0091a25000 - 0x0091a25fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.0 10 <- [0x0091a26000 - 0x0091a26fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.0 18 <- [0x0091a27000 - 0x0091a27fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.1 10 <- [0x0091a28000 - 0x0091a28fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.1 18 <- [0x0091a29000 - 0x0091a29fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.2 18 <- [0x0091a2a000 - 0x0091a2afff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.3 10 <- [0x0091a2b000 - 0x0091a2bfff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.3 18 <- [0x0091a2c000 - 0x0091a2cfff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.0 10 <- [0x0091a2d000 - 0x0091a2dfff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.0 18 <- [0x0091a2e000 - 0x0091a2efff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.1 10 <- [0x0091a2f000 - 0x0091a2ffff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.1 18 <- [0x0091a30000 - 0x0091a30fff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.2 10 <- [0x0091a31000 - 0x0091a31fff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.2 18 <- [0x0091a32000 - 0x0091a32fff] size 0x00001000 gran 0x0c mem64 PCI: 00:1e.0 10 <- [0x0091a33000 - 0x0091a33fff] size 0x00001000 gran 0x0c mem64 PCI: 00:1e.0 18 <- [0x0091a34000 - 0x0091a34fff] size 0x00001000 gran 0x0c mem64 PCI: 00:1f.1 10 <- [0x0091a38000 - 0x0091a380ff] size 0x00000100 gran 0x08 mem64 Done setting resources. Done allocating resources. BS: BS_DEV_RESOURCES run times (exec / console): 2 / 1132 ms POST: 0x94 POST: 0x94 BS: BS_DEV_ENABLE entry times (exec / console): 0 / 2 ms POST: 0x74 Enabling resources... PCI: 00:00.0 subsystem <- 8086/5af0 PCI: 00:00.0 cmd <- 07 PCI: 00:00.2 subsystem <- 8086/5a8e PCI: 00:00.2 cmd <- 06 PCI: 00:02.0 subsystem <- 8086/5a85 PCI: 00:02.0 cmd <- 03 PCI: 00:0d.1 subsystem <- 8086/5a94 PCI: 00:0d.1 cmd <- 07 PCI: 00:0d.2 subsystem <- 8086/5a96 PCI: 00:0d.2 cmd <- 406 PCI: 00:0d.3 subsystem <- 8086/5aec PCI: 00:0d.3 cmd <- 06 PCI: 00:0e.0 subsystem <- 8086/5a98 PCI: 00:0e.0 cmd <- 02 PCI: 00:0f.0 subsystem <- 8086/5a9a PCI: 00:0f.0 cmd <- 06 PCI: 00:0f.1 subsystem <- 8086/5a9c PCI: 00:0f.1 cmd <- 06 PCI: 00:0f.2 subsystem <- 8086/5a9e PCI: 00:0f.2 cmd <- 06 PCI: 00:11.0 subsystem <- 8086/5aa2 PCI: 00:11.0 cmd <- 06 PCI: 00:12.0 subsystem <- 8086/5ae3 PCI: 00:12.0 cmd <- 03 PCI: 00:13.0 bridge ctrl <- 0013 PCI: 00:13.0 cmd <- 00 PCI: 00:13.1 bridge ctrl <- 0013 PCI: 00:13.1 cmd <- 00 PCI: 00:13.2 bridge ctrl <- 0013 PCI: 00:13.2 cmd <- 00 PCI: 00:13.3 bridge ctrl <- 0013 PCI: 00:13.3 cmd <- 00 PCI: 00:14.0 bridge ctrl <- 0013 PCI: 00:14.0 cmd <- 00 PCI: 00:15.0 subsystem <- 8086/5aa8 PCI: 00:15.0 cmd <- 02 PCI: 00:16.0 subsystem <- 8086/5aac PCI: 00:16.0 cmd <- 02 PCI: 00:16.1 subsystem <- 8086/5aae PCI: 00:16.1 cmd <- 02 PCI: 00:16.2 subsystem <- 8086/5ab0 PCI: 00:16.2 cmd <- 02 PCI: 00:16.3 subsystem <- 8086/5ab2 PCI: 00:16.3 cmd <- 02 PCI: 00:18.0 subsystem <- 8086/5abc PCI: 00:18.0 cmd <- 02 PCI: 00:18.1 subsystem <- 8086/5abe PCI: 00:18.1 cmd <- 02 PCI: 00:18.2 subsystem <- 8086/5ac0 PCI: 00:18.2 cmd <- 06 PCI: 00:18.3 subsystem <- 8086/5aee PCI: 00:18.3 cmd <- 02 PCI: 00:19.0 subsystem <- 8086/5ac2 PCI: 00:19.0 cmd <- 02 PCI: 00:19.1 subsystem <- 8086/5ac4 PCI: 00:19.1 cmd <- 02 PCI: 00:19.2 subsystem <- 8086/5ac6 PCI: 00:19.2 cmd <- 02 PCI: 00:1e.0 subsystem <- 8086/5ad0 PCI: 00:1e.0 cmd <- 06 PCI: 00:1f.0 subsystem <- 8086/5ae8 PCI: 00:1f.0 cmd <- 07 PCI: 00:1f.1 subsystem <- 8086/5ad4 PCI: 00:1f.1 cmd <- 03 done. BS: BS_DEV_ENABLE run times (exec / console): 0 / 193 ms reply is too large BS: BS_DEV_INIT entry times (exec / console): 4 / 2 ms POST: 0x75 Initializing devices... POST: 0x75 CPU_CLUSTER: 0 init MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007b000000 size 0x7af40000 type 6 0x000000007b000000 - 0x0000000080000000 size 0x05000000 type 0 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0 0x0000000100000000 - 0x0000000180000000 size 0x80000000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 CPU physical address size: 39 bits MTRR: default type WB/UC MTRR counts: 6/5. MTRR: UC selected as default type. MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 MTRR: 1 base 0x000000007b000000 mask 0x0000007fff000000 type 0 MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1 MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled POST: 0x93 Setting up local APIC... apic_id: 0x00 done. Detected 4 core, 4 thread CPU. Will perform SMM setup. CBFS: Found 'cpu_microcode_blob.bin' @0xa000 size 0xbc00 in mcache @0x7abfd0ac microcode: sig=0x506c9 pf=0x1 revision=0x3c microcode: updated to revision 0x40 date=2020-02-27 CPU: Intel(R) Celeron(R) CPU J3455 @ 1.50GHz. Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170 Processing 16 relocs. Offset value of 0x00030000 Attempting to start 3 APs Waiting for 10ms after sending INIT. Waiting for 1st SIPI to complete...done. Waiting for 2nd SIPI to complete...done. AP: slot 3 apic_id 2, MCU rev: 0x00000040 AP: slot 1 apic_id 6, MCU rev: 0x0000003c AP: slot 2 apic_id 4, MCU rev: 0x0000003c Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0 Processing 11 relocs. Offset value of 0x00038000 SMM Module: stub loaded at 0x00038000. Will call 0x7aba0383 Installing permanent SMM handler to 0x7b000000 Loading module at 0x7b010000 with entry 0x7b010a5d. filesize: 0x2670 memsize: 0x6760 Processing 164 relocs. Offset value of 0x7b010000 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1a0 memsize: 0x1a0 Processing 11 relocs. Offset value of 0x7b008000 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a5d Clearing SMI status registers smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1 Relocation complete. Initializing CPU #0 CPU: vendor Intel device 506c9 CPU: family 06, model 5c, stepping 09 CPU #0 initialized Initializing CPU #1 Initializing CPU #3 CPU: vendor Intel device 506c9 CPU: family 06, model 5c, stepping 09 CPU: vendor Intel device 506c9 CPU: family 06, model 5c, stepping 09 Initializing CPU #2 CPU #3 initialized CPU #1 initialized CPU: vendor Intel device 506c9 CPU: family 06, model 5c, stepping 09 CPU #2 initialized bsp_do_flight_plan done after 171 msecs. Enabling SMIs. MTRR: TEMPORARY Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007b000000 size 0x7af40000 type 6 0x000000007b000000 - 0x00000000ff800000 size 0x84800000 type 0 0x00000000ff800000 - 0x0000000100000000 size 0x00800000 type 5 0x0000000100000000 - 0x0000000180000000 size 0x80000000 type 6 MTRR: default type WB/UC MTRR counts: 11/5. MTRR: UC selected as default type. MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 MTRR: 1 base 0x000000007b000000 mask 0x0000007fff000000 type 0 MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0 MTRR: 3 base 0x00000000ff800000 mask 0x0000007fff800000 type 5 MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6 CPU_CLUSTER: 0 init finished in 478 msecs POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 PCI: 00:00.0 init PCI: 00:00.0 init finished in 0 msecs POST: 0x75 PCI: 00:00.2 init PCI: 00:00.2 init finished in 0 msecs POST: 0x75 PCI: 00:02.0 init CBFS: 'vbt.bin' not found. CBFS: 'pci8086,5a85.rom' not found. GMA: VBT couldn't be found CBFS: 'pci8086,5a85.rom' not found. PCI: 00:02.0 init finished in 12 msecs POST: 0x75 POST: 0x75 PCI: 00:0d.1 init PMC: Using default GPE route. apm_control: Disabling ACPI. APMC done. SLP S3 assertion width: 2000000 usecs Set power on after power failure. PCI: 00:0d.1 init finished in 14 msecs POST: 0x75 POST: 0x75 PCI: 00:0d.3 init PCI: 00:0d.3 init finished in 0 msecs POST: 0x75 POST: 0x75 PCI: 00:0f.0 init PCI: 00:0f.0 init finished in 0 msecs POST: 0x75 PCI: 00:0f.1 init PCI: 00:0f.1 init finished in 0 msecs POST: 0x75 PCI: 00:0f.2 init PCI: 00:0f.2 init finished in 0 msecs POST: 0x75 PCI: 00:11.0 init PCI: 00:11.0 init finished in 0 msecs POST: 0x75 PCI: 00:12.0 init PCI: 00:12.0 init finished in 0 msecs POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 PCI: 00:15.0 init PCI: 00:15.0 init finished in 0 msecs POST: 0x75 PCI: 00:16.0 init I2C bus 0 version 0x3132312a DW I2C bus 0 at 0x91a1e000 (400 KHz) PCI: 00:16.0 init finished in 6 msecs POST: 0x75 PCI: 00:16.1 init I2C bus 1 version 0x3132312a DW I2C bus 1 at 0x91a20000 (400 KHz) PCI: 00:16.1 init finished in 6 msecs POST: 0x75 PCI: 00:16.2 init I2C bus 2 version 0x3132312a DW I2C bus 2 at 0x91a22000 (400 KHz) PCI: 00:16.2 init finished in 6 msecs POST: 0x75 PCI: 00:16.3 init I2C bus 3 version 0x3132312a DW I2C bus 3 at 0x91a24000 (400 KHz) PCI: 00:16.3 init finished in 6 msecs POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 PCI: 00:1e.0 init PCI: 00:1e.0 init finished in 0 msecs POST: 0x75 PCI: 00:1f.0 init RTC Init PCI: 00:1f.0 init finished in 1 msecs POST: 0x75 PCI: 00:1f.1 init PCI: 00:1f.1 init finished in 0 msecs Devices initialized BS: BS_DEV_INIT run times (exec / console): 94 / 599 ms ME: Version: Unavailable BS: BS_DEV_INIT exit times (exec / console): 1 / 3 ms POST: 0x76 Finalize devices... Devices finalized BS: BS_POST_DEVICE run times (exec / console): 0 / 5 ms POST: 0x77 BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 1 ms POST: 0x79 POST: 0x9c CBFS: Found 'fallback/dsdt.aml' @0x2c5c0 size 0x1c00 in mcache @0x7abfd1c8 CBFS: 'fallback/slic' not found. ACPI: Writing ACPI tables at 7ab22000. ACPI: * FACS ACPI: * DSDT PCI space above 4GB MMIO is at 0x180000000, len = 0x7e80000000 ACPI: * FADT SCI is IRQ9 ACPI: added table 1/32, length now 40 ACPI: * SSDT Found 1 CPU(s) with 4/4 physical/logical core(s) each. Turbo is available and visible PSS: 1501MHz power 10000 control 0x1700 status 0x1700 PSS: 1500MHz power 10000 control 0xf00 status 0xf00 PSS: 1400MHz power 9218 control 0xe00 status 0xe00 PSS: 1200MHz power 7728 control 0xc00 status 0xc00 PSS: 1000MHz power 6280 control 0xa00 status 0xa00 PSS: 800MHz power 4908 control 0x800 status 0x800 PSS: 1501MHz power 10000 control 0x1700 status 0x1700 PSS: 1500MHz power 10000 control 0xf00 status 0xf00 PSS: 1400MHz power 9218 control 0xe00 status 0xe00 PSS: 1200MHz power 7728 control 0xc00 status 0xc00 PSS: 1000MHz power 6280 control 0xa00 status 0xa00 PSS: 800MHz power 4908 control 0x800 status 0x800 PSS: 1501MHz power 10000 control 0x1700 status 0x1700 PSS: 1500MHz power 10000 control 0xf00 status 0xf00 PSS: 1400MHz power 9218 control 0xe00 status 0xe00 PSS: 1200MHz power 7728 control 0xc00 status 0xc00 PSS: 1000MHz power 6280 control 0xa00 status 0xa00 PSS: 800MHz power 4908 control 0x800 status 0x800 PSS: 1501MHz power 10000 control 0x1700 status 0x1700 PSS: 1500MHz power 10000 control 0xf00 status 0xf00 PSS: 1400MHz power 9218 control 0xe00 status 0xe00 PSS: 1200MHz power 7728 control 0xc00 status 0xc00 PSS: 1000MHz power 6280 control 0xa00 status 0xa00 PSS: 800MHz power 4908 control 0x800 status 0x800 ACPI: added table 2/32, length now 44 ACPI: * MCFG ACPI: added table 3/32, length now 48 ACPI: * MADT SCI is IRQ9 ACPI: added table 4/32, length now 52 current = 7ab24950 ACPI: * DMAR ACPI: added table 5/32, length now 56 ACPI: added table 6/32, length now 60 ACPI: * HPET ACPI: added table 7/32, length now 64 ACPI: done. ACPI tables: 10896 bytes. smbios_write_tables: 7ab21000 SMBIOS firmware version is set to coreboot_version: '4.13-3184-ga0c7f34302' SMBIOS tables: 605 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 252a Writing coreboot table at 0x7ab46000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-000000000fffffff: RAM 4. 0000000010000000-0000000012150fff: RESERVED 5. 0000000012151000-000000007ab20fff: RAM 6. 000000007ab21000-000000007ab89fff: CONFIGURATION TABLES 7. 000000007ab8a000-000000007abcffff: RAMSTAGE 8. 000000007abd0000-000000007affffff: CONFIGURATION TABLES 9. 000000007b000000-000000007fffffff: RESERVED 10. 00000000d0000000-00000000d0ffffff: RESERVED 11. 00000000e0000000-00000000efffffff: RESERVED 12. 00000000fe042000-00000000fe043fff: RESERVED 13. 00000000fed10000-00000000fed17fff: RESERVED 14. 00000000fed64000-00000000fed65fff: RESERVED 15. 0000000100000000-000000017fffffff: RAM SF: Detected 00 0000 with sector size 0x1000, total 0x1000000 Wrote coreboot table at: 0x7ab46000, 0x44c bytes, checksum 3ea0 coreboot table: 1124 bytes. IMD ROOT 0. 0x7afff000 0x00001000 IMD SMALL 1. 0x7affe000 0x00001000 FSP MEMORY 2. 0x7abfe000 0x00400000 RO MCACHE 3. 0x7abfd000 0x00000354 CONSOLE 4. 0x7abdd000 0x00020000 TIME STAMP 5. 0x7abdc000 0x00000910 ROMSTG STCK 6. 0x7abdb000 0x00001000 AFTER CAR 7. 0x7abd0000 0x0000b000 RAMSTAGE 8. 0x7ab89000 0x00047000 REFCODE 9. 0x7ab5e000 0x0002b000 SMM BACKUP 10. 0x7ab4e000 0x00010000 COREBOOT 11. 0x7ab46000 0x00008000 ACPI 12. 0x7ab22000 0x00024000 SMBIOS 13. 0x7ab21000 0x00000800 IMD small region: IMD ROOT 0. 0x7affec00 0x00000400 FSP RUNTIME 1. 0x7affebe0 0x00000004 FMAP 2. 0x7affe920 0x000002ae POWER STATE 3. 0x7affe8e0 0x00000040 ROMSTAGE 4. 0x7affe8c0 0x00000004 ACPI GNVS 5. 0x7affe7c0 0x00000100 BS: BS_WRITE_TABLES run times (exec / console): 1 / 401 ms POST: 0x7a CBFS: Found 'fallback/payload' @0xb8340 size 0xb7c82 in mcache @0x7abfd2c4 Checking segment from ROM address 0xffcfb36c Checking segment from ROM address 0xffcfb388 Loading segment from ROM address 0xffcfb36c code (compression=1) New segment dstaddr 0x00800000 memsize 0x800000 srcaddr 0xffcfb3a4 filesize 0xb7c4a Loading Segment: addr: 0x00800000 memsz: 0x0000000000800000 filesz: 0x00000000000b7c4a using LZMA Loading segment from ROM address 0xffcfb388 Entry Point 0x00803120 BS: BS_PAYLOAD_LOAD run times (exec / console): 234 / 49 ms POST: 0x95 POST: 0x95 POST: 0x88 POST: 0x89 CSE FWSTS1: 0x80003042 CSE FWSTS2: 0x39220000 CSE FWSTS3: 0x00000000 CSE FWSTS4: 0x00080004 CSE FWSTS5: 0x00000000 CSE FWSTS6: 0x40000000 ME: Manufacturing Mode : NO ME: FPF status : unknown BUG: check_xdci_enable requests hidden 00:15.1 BS: BS_PAYLOAD_LOAD exit times (exec / console): 6 / 31 ms POST: 0x7b mp_park_aps done after 0 msecs. Jumping to boot code at 0x00803120(0x7ab46000) POST: 0xf8 [=3h[=3hBooting from 'USB: Synology DiskStation ' failed; verify it contains a 64-bit UEFI OS. Press any key to continue booting... Consoles: EFI console |/-\|/ Reading loader env vars from /efi/freebsd/loader.env Setting currdev to disk1p1: -\|/-\FreeBSD/amd64 EFI loader, Revision 1.1 Command line arguments: loader.efi Image base: 0x17eb3d000 EFI version: 2.70 EFI Firmware: EDK II (rev 1.00) Console: efi (0x1000) Load Path: \EFI\BOOT\BOOTX64.EFI Load Device: PciRoot(0x0)/Pci(0x15,0x0)/USB(0x0,0x0)/HD(1,MBR,0x90909090,0x1,0x10418) BootCurrent: 0002 BootOrder: 0000 0001 0002[*] 0003 BootInfo Path: PciRoot(0x0)/Pci(0x15,0x0)/USB(0x0,0x0) Ignoring Boot0002: Only one DP found Trying ESP: PciRoot(0x0)/Pci(0x15,0x0)/USB(0x0,0x0)/HD(1,MBR,0x90909090,0x1,0x10418) Setting currdev to disk1p1: |/-\|/-\|/-\Trying: PciRoot(0x0)/Pci(0x15,0x0)/USB(0x0,0x0)/HD(2,MBR,0x90909090,0x10419,0x1F7ED0) Setting currdev to disk1p2: |/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/Loading /boot/defaults/loader.conf -\|/-Loading /boot/defaults/loader.conf Loading /boot/device.hints \|/-\Loading /boot/loader.conf |/-\Loading /boot/loader.conf.local |/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/[=3h?c-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/ ``` ` s` `.....---.......--.``` -/ +o .--` /y:` +. yo`:. :o `+- y/ -/` -o/ .- ::/sy+:. / `-- / `: :` `: :` / / .- -. -- -. `:` `:` .-- `--. .---.....----. ______ ____ _____ _____  | ____| | _ \ / ____| __ \  | |___ _ __ ___ ___ | |_) | (___ | | | | | ___| '__/ _ \/ _ \| _ < \___ \| | | | | | | | | __/ __/| |_) |____) | |__| | | | | | | | || | | | |_| |_| \___|\___||____/|_____/|_____/ ษศปผออออออออออออออออออออออออออออออออออออออออออออออออออออออออออออออออออออออออออออออออออบบบบบบบบบบบบบบบบบบบบบบบบWelcome to FreeBSD1. Boot Multi user [Enter]2. Boot Single user3. Escape to loader prompt4. Reboot5. Cons: SerialOptions:6. Kernel: default/kernel (1 of 1)7. Boot OptionsAutoboot in 10 seconds, hit [Enter] to boot or any other key to stop Autoboot in 9 seconds, hit [Enter] to boot or any other key to stop Autoboot in 8 seconds, hit [Enter] to boot or any other key to stop Autoboot in 7 seconds, hit [Enter] to boot or any other key to stop Autoboot in 6 seconds, hit [Enter] to boot or any other key to stop Autoboot in 5 seconds, hit [Enter] to boot or any other key to stop Autoboot in 4 seconds, hit [Enter] to boot or any other key to stop Autoboot in 3 seconds, hit [Enter] to boot or any other key to stop Autoboot in 2 seconds, hit [Enter] to boot or any other key to stop Autoboot in 1 seconds, hit [Enter] to boot or any other key to stop Autoboot in 0 seconds, hit [Enter] to boot or any other key to stop Loading kernel... -\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/boot/kernel/kernel text=0x17b9e0 /-\|/-\|/-\|text=0xdd6d30 /-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-text=0x65b9ac \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/data=0x140 data=0x1b9348+0x445cb8 -\|/-\|/-\|/-\|syms=[0x8+0x178e90/-\|/-\|/-\|+0x8+0x199058/-\|/-\|/-\|] Loading configured modules... /-\|/-\|/-\|/-\can't find '/boot/entropy' |/-\|/-\|/-\|/-can't find '/etc/hostid' Start @ 0xffffffff8037c000 ... \|/-\EFI framebuffer information: addr, size 0x0, 0x0 dimensions 0 x 0 stride 0 masks 0x00000000, 0x00000000, 0x00000000, 0x00000000 !!!! X64 Exception Type - 0E(#PF - Page-Fault) CPU Apic ID - 00000000 !!!! ExceptionData - 0000000000000003 I:0 R:0 U:0 W:1 P:1 PK:0 SS:0 SGX:0 RIP - 000000017EB4006C, CS - 0000000000000038, RFLAGS - 0000000000010002 RAX - 000000003EA00008, RCX - 0000000002C00000, RDX - 0000000040000000 RBX - 000000003BFFFFF8, RSP - 000000003BFFFFE8, RBP - 000000003BFFFFE8 RSI - 43BB53AAFFFFFFFF, RDI - 000000003BFFFFF8 R8 - 000000003BFFC000, R9 - FFFFFFFF8037C000, R10 - 000000017BBAB0D0 R11 - 0000000000000840, R12 - 000000000211E000, R13 - 0000000002113000 R14 - 000000003BFFC000, R15 - FFFFFFFF8037C000 DS - 0000000000000030, ES - 0000000000000030, FS - 0000000000000030 GS - 0000000000000030, SS - 0000000000000030 CR0 - 0000000080010013, CR2 - 0000000002C00000, CR3 - 0000000002C01000 CR4 - 0000000000000628, CR8 - 0000000000000000 DR0 - 0000000000000000, DR1 - 0000000000000000, DR2 - 0000000000000000 DR3 - 0000000000000000, DR6 - 00000000FFFF0FF0, DR7 - 0000000000000400 GDTR - 000000007AB1E000 0000000000000047, LDTR - 0000000000000000 IDTR - 000000017FDDF018 0000000000000FFF, TR - 0000000000000000 FXSAVE_STATE - 000000003BFFFC40 !!!! Can't find image information. !!!! FMAP: Found "FLASH" version 1.1 at 0x300000. FMAP: base = 0x0 size = 0x1000000 #areas = 15 FMAP: area COREBOOT found @ 342000 (3657728 bytes) FMAP: area COREBOOT found @ 342000 (3657728 bytes) CBFS: mcache @0xfef04e00 built for 15 files, used 0x354 of 0x2000 bytes CBFS: Found 'fallback/romstage' @0x80 size 0x9ed8 in mcache @0xfef04e2c BS: bootblock times (exec / console): total (unknown) / 43 ms coreboot-4.13-3184-ga0c7f34302 Wed Apr 14 12:18:58 UTC 2021 romstage starting (log level: 7)... CPU: Intel(R) Celeron(R) CPU J3455 @ 1.50GHz CPU: ID 506c9, Apollolake B0, ucode: 0000003c CPU: AES Supported, TXT Not Supported, VT Supported MCH: device id 5af0 (rev 0b) is Apollolake PCH: device id 5ae8 (rev 0b) is Apollolake IGD: device id 5a85 (rev 0b) is Apollolake HD 500 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00000000 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000 prsts: 00000000 tco_sts: 0000 0000 gen_pmcon1: 08004000 gen_pmcon2: 00003a00 gen_pmcon3: 00000000 prev_sleep_state 0 FMAP: area COREBOOT found @ 342000 (3657728 bytes) FMAP: area COREBOOT found @ 342000 (3657728 bytes) CBFS: Found 'fspm.bin' @0x2e200 size 0x59000 in mcache @0xfef04ff4 POST: 0x34 FMAP: area RW_MRC_CACHE found @ 311000 (65536 bytes) FMAP: area RW_VAR_MRC_CACHE found @ 321000 (4096 bytes) POST: 0x36 POST: 0x92 POST: 0x98 CBMEM: IMD: root @ 0x7afff000 254 entries. IMD: root @ 0x7affec00 62 entries. External stage cache: IMD: root @ 0x7b7ff000 254 entries. IMD: root @ 0x7b7fec00 62 entries. FMAP: area RW_MRC_CACHE found @ 311000 (65536 bytes) MRC: Checking cached data update for 'RW_MRC_CACHE'. SF: Detected 00 0000 with sector size 0x1000, total 0x1000000 MRC: 'RW_MRC_CACHE' does not need update. CPU: frequency set to 2300 MHz FMAP: area RW_VAR_MRC_CACHE found @ 321000 (4096 bytes) MRC: Checking cached data update for 'RW_VAR_MRC_CACHE'. MRC: cache data 'RW_VAR_MRC_CACHE' needs update. MRC: updated 'RW_VAR_MRC_CACHE'. WEAK: src/soc/intel/apollolake/romstage.c/mainboard_save_dimm_info called SMM Memory Map SMRAM : 0x7b000000 0x800000 Subregion 0: 0x7b000000 0x700000 Subregion 1: 0x7b700000 0x100000 Subregion 2: 0x7b800000 0x0 top_of_ram = 0x7b000000 MTRR Range: Start=7a000000 End=7b000000 (Size 1000000) MTRR Range: Start=7b000000 End=7b800000 (Size 800000) MTRR Range: Start=ff000000 End=0 (Size 1000000) Normal boot CBFS: Found 'fallback/postcar' @0xb3000 size 0x52c0 in mcache @0xfef05080 Loading module at 0x7abd1000 with entry 0x7abd1031. filesize: 0x4f50 memsize: 0x92b8 Processing 204 relocs. Offset value of 0x78bd1000 BS: romstage times (exec / console): total (unknown) / 226 ms coreboot-4.13-3184-ga0c7f34302 Wed Apr 14 12:18:58 UTC 2021 postcar starting (log level: 7)... Normal boot FMAP: area COREBOOT found @ 342000 (3657728 bytes) FMAP: area COREBOOT found @ 342000 (3657728 bytes) CBFS: Found 'fallback/ramstage' @0x15cc0 size 0x16302 in mcache @0x7abfd10c Loading module at 0x7ab8a000 with entry 0x7ab8a000. filesize: 0x301d0 memsize: 0x45570 Processing 3099 relocs. Offset value of 0x79d8a000 BS: postcar times (exec / console): total (unknown) / 42 ms coreboot-4.13-3184-ga0c7f34302 Wed Apr 14 12:18:58 UTC 2021 ramstage starting (log level: 7)... POST: 0x39 POST: 0x80 Normal boot ACPI _SWS is PM1 Index 8 GPE Index -1 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms POST: 0x70 BS: BS_PRE_DEVICE run times (exec / console): 0 / 1 ms POST: 0x71 FMAP: area COREBOOT found @ 342000 (3657728 bytes) FMAP: area COREBOOT found @ 342000 (3657728 bytes) CBFS: Found 'fsps.bin' @0x87fc0 size 0x2b000 in mcache @0x7abfd240 WEAK: src/soc/intel/apollolake/chip.c/mainboard_silicon_init_params called POST: 0x93 FSPS returned 0 POST: 0x99 ITSS IRQ Polarities Before: IPC0: 0xffffeef8 IPC1: 0xffffffff IPC2: 0xffffffff IPC3: 0x00ffffff ITSS IRQ Polarities After: IPC0: 0xffffeef8 IPC1: 0x0003ffff IPC2: 0x00000000 IPC3: 0x00000000 CPU TDP = 10 Watts CPU PL1 = 10 Watts CPU PL2 = 12 Watts BS: BS_DEV_INIT_CHIPS run times (exec / console): 74 / 55 ms POST: 0x72 Enumerating buses... Root Device scanning... CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 POST: 0x24 PCI: 00:00.0 [8086/5af0] enabled PCI: Static device PCI: 00:00.1 not found, disabling it. PCI: 00:00.2 [8086/5a8e] enabled PCI: 00:02.0 [8086/5a85] enabled PCI: 00:0d.0 [8086/5a92] enabled PCI: 00:0d.1 [8086/5a94] enabled PCI: 00:0d.2 [8086/5a96] enabled PCI: 00:0d.3 [8086/5aec] enabled PCI: 00:0e.0 [8086/5a98] enabled PCI: 00:0f.0 [8086/5a9a] enabled PCI: 00:0f.1 [8086/5a9c] enabled PCI: 00:0f.2 [8086/5a9e] enabled PCI: 00:11.0 [8086/5aa2] enabled PCI: 00:12.0 [8086/5ae3] enabled PCI: 00:13.0 subordinate bus PCI Express PCI: 00:13.0 [8086/5ad8] enabled PCI: 00:13.1 subordinate bus PCI Express PCI: 00:13.1 [8086/5ad9] enabled PCI: 00:13.2 subordinate bus PCI Express PCI: 00:13.2 [8086/5ada] enabled PCI: 00:13.3 subordinate bus PCI Express PCI: 00:13.3 [8086/5adb] enabled PCI: 00:14.0 subordinate bus PCI Express PCI: 00:14.0 [8086/5ad6] enabled PCI: 00:15.0 [8086/5aa8] enabled PCI: 00:16.0 [8086/5aac] enabled PCI: 00:16.1 [8086/5aae] enabled PCI: 00:16.2 [8086/5ab0] enabled PCI: 00:16.3 [8086/5ab2] enabled PCI: 00:18.0 [8086/5abc] enabled PCI: 00:18.1 [8086/5abe] enabled PCI: 00:18.2 [8086/5ac0] enabled PCI: 00:18.3 [8086/5aee] enabled PCI: 00:19.0 [8086/5ac2] enabled PCI: 00:19.1 [8086/5ac4] enabled PCI: 00:19.2 [8086/5ac6] enabled PCI: Static device PCI: 00:1a.0 not found, disabling it. PCI: 00:1e.0 [8086/5ad0] enabled PCI: 00:1f.0 [8086/5ae8] enabled PCI: 00:1f.1 [8086/5ad4] enabled POST: 0x25 PCI: Leftover static devices: PCI: 00:00.1 PCI: 00:03.0 PCI: 00:14.1 PCI: 00:15.1 PCI: 00:17.0 PCI: 00:17.1 PCI: 00:17.2 PCI: 00:17.3 PCI: 00:1a.0 PCI: 00:1b.0 PCI: 00:1c.0 PCI: Check your devicetree.cb. PCI: 00:02.0 scanning... scan_bus: bus PCI: 00:02.0 finished in 0 msecs PCI: 00:0d.1 scanning... scan_bus: bus PCI: 00:0d.1 finished in 0 msecs PCI: 00:0d.2 scanning... scan_bus: bus PCI: 00:0d.2 finished in 0 msecs PCI: 00:0e.0 scanning... scan_bus: bus PCI: 00:0e.0 finished in 0 msecs PCI: 00:13.0 scanning... PCI: pci_scan_bus for bus 01 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:13.0 finished in 6 msecs PCI: 00:13.1 scanning... PCI: pci_scan_bus for bus 02 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:13.1 finished in 6 msecs PCI: 00:13.2 scanning... PCI: pci_scan_bus for bus 03 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:13.2 finished in 6 msecs PCI: 00:13.3 scanning... PCI: pci_scan_bus for bus 04 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:13.3 finished in 6 msecs PCI: 00:14.0 scanning... PCI: pci_scan_bus for bus 05 POST: 0x24 POST: 0x25 POST: 0x55 scan_bus: bus PCI: 00:14.0 finished in 6 msecs PCI: 00:15.0 scanning... scan_bus: bus PCI: 00:15.0 finished in 0 msecs PCI: 00:16.0 scanning... scan_bus: bus PCI: 00:16.0 finished in 0 msecs PCI: 00:16.1 scanning... scan_bus: bus PCI: 00:16.1 finished in 0 msecs PCI: 00:16.2 scanning... scan_bus: bus PCI: 00:16.2 finished in 0 msecs PCI: 00:16.3 scanning... scan_bus: bus PCI: 00:16.3 finished in 0 msecs PCI: 00:19.0 scanning... scan_bus: bus PCI: 00:19.0 finished in 0 msecs PCI: 00:19.1 scanning... scan_bus: bus PCI: 00:19.1 finished in 0 msecs PCI: 00:19.2 scanning... scan_bus: bus PCI: 00:19.2 finished in 0 msecs PCI: 00:1f.0 scanning... scan_bus: bus PCI: 00:1f.0 finished in 0 msecs PCI: 00:1f.1 scanning... scan_bus: bus PCI: 00:1f.1 finished in 0 msecs POST: 0x55 scan_bus: bus DOMAIN: 0000 finished in 339 msecs scan_bus: bus Root Device finished in 351 msecs done BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 361 ms FMAP: area UNIFIED_MRC_CACHE found @ 301000 (135168 bytes) MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'. BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 11 ms POST: 0x73 found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Done reading resources. ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) === === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) === DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff update_constraints: PCI: 00:0d.1 20 base 00000400 limit 000004ff io (fixed) update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed) update_constraints: PCI: 00:1f.1 20 base 0000efa0 limit 0000efbf io (fixed) DOMAIN: 0000: Resource ranges: * Base: 1000, Size: dfa0, Tag: 100 * Base: efc0, Size: 1040, Tag: 100 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io PCI: 00:12.0 20 * [0x1040 - 0x105f] limit: 105f io PCI: 00:12.0 18 * [0x1060 - 0x1067] limit: 1067 io PCI: 00:12.0 1c * [0x1068 - 0x106b] limit: 106b io DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed) update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed) update_constraints: PCI: 00:00.0 02 base fed64000 limit fed64fff mem (fixed) update_constraints: PCI: 00:00.0 03 base fed65000 limit fed65fff mem (fixed) update_constraints: PCI: 00:00.0 04 base 00000000 limit 0009ffff mem (fixed) update_constraints: PCI: 00:00.0 05 base 000c0000 limit 7affffff mem (fixed) update_constraints: PCI: 00:00.0 06 base 7b000000 limit 7fffffff mem (fixed) update_constraints: PCI: 00:00.0 07 base 100000000 limit 17fffffff mem (fixed) update_constraints: PCI: 00:00.0 08 base 000a0000 limit 000bffff mem (fixed) update_constraints: PCI: 00:00.0 09 base 000c0000 limit 000fffff mem (fixed) update_constraints: PCI: 00:00.0 0a base 11800000 limit 11bfffff mem (fixed) update_constraints: PCI: 00:00.0 0b base 11000000 limit 117fffff mem (fixed) update_constraints: PCI: 00:00.0 0c base 12000000 limit 120fffff mem (fixed) update_constraints: PCI: 00:00.0 0d base 12150000 limit 12150fff mem (fixed) update_constraints: PCI: 00:00.0 0e base 12140000 limit 1214ffff mem (fixed) update_constraints: PCI: 00:00.0 0f base 10000000 limit 10ffffff mem (fixed) update_constraints: PCI: 00:00.0 10 base 11c00000 limit 11ffffff mem (fixed) update_constraints: PCI: 00:00.0 11 base 12100000 limit 1213ffff mem (fixed) update_constraints: PCI: 00:0d.0 10 base d0000000 limit d0ffffff mem (fixed) update_constraints: PCI: 00:0d.1 10 base fe042000 limit fe043fff mem (fixed) update_constraints: PCI: 00:0d.3 10 base fe900000 limit fe901fff mem (fixed) update_constraints: PCI: 00:0d.3 18 base fe902000 limit fe902fff mem (fixed) update_constraints: PCI: 00:18.2 10 base ddffc000 limit ddffcfff mem (fixed) DOMAIN: 0000: Resource ranges: * Base: 80000000, Size: 50000000, Tag: 200 * Base: d1000000, Size: cffc000, Tag: 200 * Base: ddffd000, Size: 2003000, Tag: 200 * Base: f0000000, Size: e042000, Tag: 200 * Base: fe044000, Size: 8bc000, Tag: 200 * Base: fe903000, Size: 40d000, Tag: 200 * Base: fed18000, Size: 4c000, Tag: 200 * Base: fed66000, Size: 129a000, Tag: 200 * Base: 180000000, Size: 7e80000000, Tag: 100200 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem PCI: 00:00.2 18 * [0x91000000 - 0x917fffff] limit: 917fffff mem PCI: 00:00.2 10 * [0x91800000 - 0x918fffff] limit: 918fffff mem PCI: 00:0e.0 20 * [0x91900000 - 0x919fffff] limit: 919fffff mem PCI: 00:15.0 10 * [0x91a00000 - 0x91a0ffff] limit: 91a0ffff mem PCI: 00:0e.0 10 * [0x91a10000 - 0x91a13fff] limit: 91a13fff mem PCI: 00:11.0 10 * [0x91a14000 - 0x91a15fff] limit: 91a15fff mem PCI: 00:12.0 10 * [0x91a16000 - 0x91a17fff] limit: 91a17fff mem PCI: 00:0d.1 18 * [0x91a18000 - 0x91a18fff] limit: 91a18fff mem PCI: 00:0d.2 10 * [0x91a19000 - 0x91a19fff] limit: 91a19fff mem PCI: 00:0f.0 10 * [0x91a1a000 - 0x91a1afff] limit: 91a1afff mem PCI: 00:0f.1 10 * [0x91a1b000 - 0x91a1bfff] limit: 91a1bfff mem PCI: 00:0f.2 10 * [0x91a1c000 - 0x91a1cfff] limit: 91a1cfff mem PCI: 00:11.0 18 * [0x91a1d000 - 0x91a1dfff] limit: 91a1dfff mem PCI: 00:16.0 10 * [0x91a1e000 - 0x91a1efff] limit: 91a1efff mem PCI: 00:16.0 18 * [0x91a1f000 - 0x91a1ffff] limit: 91a1ffff mem PCI: 00:16.1 10 * [0x91a20000 - 0x91a20fff] limit: 91a20fff mem PCI: 00:16.1 18 * [0x91a21000 - 0x91a21fff] limit: 91a21fff mem PCI: 00:16.2 10 * [0x91a22000 - 0x91a22fff] limit: 91a22fff mem PCI: 00:16.2 18 * [0x91a23000 - 0x91a23fff] limit: 91a23fff mem PCI: 00:16.3 10 * [0x91a24000 - 0x91a24fff] limit: 91a24fff mem PCI: 00:16.3 18 * [0x91a25000 - 0x91a25fff] limit: 91a25fff mem PCI: 00:18.0 10 * [0x91a26000 - 0x91a26fff] limit: 91a26fff mem PCI: 00:18.0 18 * [0x91a27000 - 0x91a27fff] limit: 91a27fff mem PCI: 00:18.1 10 * [0x91a28000 - 0x91a28fff] limit: 91a28fff mem PCI: 00:18.1 18 * [0x91a29000 - 0x91a29fff] limit: 91a29fff mem PCI: 00:18.2 18 * [0x91a2a000 - 0x91a2afff] limit: 91a2afff mem PCI: 00:18.3 10 * [0x91a2b000 - 0x91a2bfff] limit: 91a2bfff mem PCI: 00:18.3 18 * [0x91a2c000 - 0x91a2cfff] limit: 91a2cfff mem PCI: 00:19.0 10 * [0x91a2d000 - 0x91a2dfff] limit: 91a2dfff mem PCI: 00:19.0 18 * [0x91a2e000 - 0x91a2efff] limit: 91a2efff mem PCI: 00:19.1 10 * [0x91a2f000 - 0x91a2ffff] limit: 91a2ffff mem PCI: 00:19.1 18 * [0x91a30000 - 0x91a30fff] limit: 91a30fff mem PCI: 00:19.2 10 * [0x91a31000 - 0x91a31fff] limit: 91a31fff mem PCI: 00:19.2 18 * [0x91a32000 - 0x91a32fff] limit: 91a32fff mem PCI: 00:1e.0 10 * [0x91a33000 - 0x91a33fff] limit: 91a33fff mem PCI: 00:1e.0 18 * [0x91a34000 - 0x91a34fff] limit: 91a34fff mem PCI: 00:12.0 24 * [0x91a35000 - 0x91a357ff] limit: 91a357ff mem PCI: 00:00.2 20 * [0x91a36000 - 0x91a361ff] limit: 91a361ff mem PCI: 00:12.0 14 * [0x91a37000 - 0x91a370ff] limit: 91a370ff mem PCI: 00:1f.1 10 * [0x91a38000 - 0x91a380ff] limit: 91a380ff mem DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done === Resource allocator: DOMAIN: 0000 - resource allocation complete === PCI: 00:00.2 10 <- [0x0091800000 - 0x00918fffff] size 0x00100000 gran 0x14 mem64 PCI: 00:00.2 18 <- [0x0091000000 - 0x00917fffff] size 0x00800000 gran 0x17 mem64 PCI: 00:00.2 20 <- [0x0091a36000 - 0x0091a361ff] size 0x00000200 gran 0x09 mem64 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io PCI: 00:0d.1 18 <- [0x0091a18000 - 0x0091a18fff] size 0x00001000 gran 0x0c mem64 PCI: 00:0d.2 10 <- [0x0091a19000 - 0x0091a19fff] size 0x00001000 gran 0x0c mem PCI: 00:0e.0 10 <- [0x0091a10000 - 0x0091a13fff] size 0x00004000 gran 0x0e mem64 PCI: 00:0e.0 20 <- [0x0091900000 - 0x00919fffff] size 0x00100000 gran 0x14 mem64 PCI: 00:0f.0 10 <- [0x0091a1a000 - 0x0091a1afff] size 0x00001000 gran 0x0c mem64 PCI: 00:0f.1 10 <- [0x0091a1b000 - 0x0091a1bfff] size 0x00001000 gran 0x0c mem64 PCI: 00:0f.2 10 <- [0x0091a1c000 - 0x0091a1cfff] size 0x00001000 gran 0x0c mem64 PCI: 00:11.0 10 <- [0x0091a14000 - 0x0091a15fff] size 0x00002000 gran 0x0d mem64 PCI: 00:11.0 18 <- [0x0091a1d000 - 0x0091a1dfff] size 0x00001000 gran 0x0c mem64 PCI: 00:12.0 10 <- [0x0091a16000 - 0x0091a17fff] size 0x00002000 gran 0x0d mem PCI: 00:12.0 14 <- [0x0091a37000 - 0x0091a370ff] size 0x00000100 gran 0x08 mem PCI: 00:12.0 18 <- [0x0000001060 - 0x0000001067] size 0x00000008 gran 0x03 io PCI: 00:12.0 1c <- [0x0000001068 - 0x000000106b] size 0x00000004 gran 0x02 io PCI: 00:12.0 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io PCI: 00:12.0 24 <- [0x0091a35000 - 0x0091a357ff] size 0x00000800 gran 0x0b mem PCI: 00:13.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:13.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:13.0 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 01 mem PCI: 00:13.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:13.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:13.1 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 02 mem PCI: 00:13.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io PCI: 00:13.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 00:13.2 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 03 mem PCI: 00:13.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io PCI: 00:13.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 04 prefmem PCI: 00:13.3 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 04 mem PCI: 00:14.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io PCI: 00:14.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 05 prefmem PCI: 00:14.0 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 05 mem PCI: 00:15.0 10 <- [0x0091a00000 - 0x0091a0ffff] size 0x00010000 gran 0x10 mem64 PCI: 00:16.0 10 <- [0x0091a1e000 - 0x0091a1efff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.0 18 <- [0x0091a1f000 - 0x0091a1ffff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.1 10 <- [0x0091a20000 - 0x0091a20fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.1 18 <- [0x0091a21000 - 0x0091a21fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.2 10 <- [0x0091a22000 - 0x0091a22fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.2 18 <- [0x0091a23000 - 0x0091a23fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.3 10 <- [0x0091a24000 - 0x0091a24fff] size 0x00001000 gran 0x0c mem64 PCI: 00:16.3 18 <- [0x0091a25000 - 0x0091a25fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.0 10 <- [0x0091a26000 - 0x0091a26fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.0 18 <- [0x0091a27000 - 0x0091a27fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.1 10 <- [0x0091a28000 - 0x0091a28fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.1 18 <- [0x0091a29000 - 0x0091a29fff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.2 18 <- [0x0091a2a000 - 0x0091a2afff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.3 10 <- [0x0091a2b000 - 0x0091a2bfff] size 0x00001000 gran 0x0c mem64 PCI: 00:18.3 18 <- [0x0091a2c000 - 0x0091a2cfff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.0 10 <- [0x0091a2d000 - 0x0091a2dfff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.0 18 <- [0x0091a2e000 - 0x0091a2efff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.1 10 <- [0x0091a2f000 - 0x0091a2ffff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.1 18 <- [0x0091a30000 - 0x0091a30fff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.2 10 <- [0x0091a31000 - 0x0091a31fff] size 0x00001000 gran 0x0c mem64 PCI: 00:19.2 18 <- [0x0091a32000 - 0x0091a32fff] size 0x00001000 gran 0x0c mem64 PCI: 00:1e.0 10 <- [0x0091a33000 - 0x0091a33fff] size 0x00001000 gran 0x0c mem64 PCI: 00:1e.0 18 <- [0x0091a34000 - 0x0091a34fff] size 0x00001000 gran 0x0c mem64 PCI: 00:1f.1 10 <- [0x0091a38000 - 0x0091a380ff] size 0x00000100 gran 0x08 mem64 Done setting resources. Done allocating resources. BS: BS_DEV_RESOURCES run times (exec / console): 2 / 1132 ms POST: 0x94 POST: 0x94 BS: BS_DEV_ENABLE entry times (exec / console): 0 / 2 ms POST: 0x74 Enabling resources... PCI: 00:00.0 subsystem <- 8086/5af0 PCI: 00:00.0 cmd <- 07 PCI: 00:00.2 subsystem <- 8086/5a8e PCI: 00:00.2 cmd <- 06 PCI: 00:02.0 subsystem <- 8086/5a85 PCI: 00:02.0 cmd <- 03 PCI: 00:0d.1 subsystem <- 8086/5a94 PCI: 00:0d.1 cmd <- 07 PCI: 00:0d.2 subsystem <- 8086/5a96 PCI: 00:0d.2 cmd <- 406 PCI: 00:0d.3 subsystem <- 8086/5aec PCI: 00:0d.3 cmd <- 06 PCI: 00:0e.0 subsystem <- 8086/5a98 PCI: 00:0e.0 cmd <- 02 PCI: 00:0f.0 subsystem <- 8086/5a9a PCI: 00:0f.0 cmd <- 06 PCI: 00:0f.1 subsystem <- 8086/5a9c PCI: 00:0f.1 cmd <- 06 PCI: 00:0f.2 subsystem <- 8086/5a9e PCI: 00:0f.2 cmd <- 06 PCI: 00:11.0 subsystem <- 8086/5aa2 PCI: 00:11.0 cmd <- 06 PCI: 00:12.0 subsystem <- 8086/5ae3 PCI: 00:12.0 cmd <- 03 PCI: 00:13.0 bridge ctrl <- 0013 PCI: 00:13.0 cmd <- 00 PCI: 00:13.1 bridge ctrl <- 0013 PCI: 00:13.1 cmd <- 00 PCI: 00:13.2 bridge ctrl <- 0013 PCI: 00:13.2 cmd <- 00 PCI: 00:13.3 bridge ctrl <- 0013 PCI: 00:13.3 cmd <- 00 PCI: 00:14.0 bridge ctrl <- 0013 PCI: 00:14.0 cmd <- 00 PCI: 00:15.0 subsystem <- 8086/5aa8 PCI: 00:15.0 cmd <- 02 PCI: 00:16.0 subsystem <- 8086/5aac PCI: 00:16.0 cmd <- 02 PCI: 00:16.1 subsystem <- 8086/5aae PCI: 00:16.1 cmd <- 02 PCI: 00:16.2 subsystem <- 8086/5ab0 PCI: 00:16.2 cmd <- 02 PCI: 00:16.3 subsystem <- 8086/5ab2 PCI: 00:16.3 cmd <- 02 PCI: 00:18.0 subsystem <- 8086/5abc PCI: 00:18.0 cmd <- 02 PCI: 00:18.1 subsystem <- 8086/5abe PCI: 00:18.1 cmd <- 02 PCI: 00:18.2 subsystem <- 8086/5ac0 PCI: 00:18.2 cmd <- 06 PCI: 00:18.3 subsystem <- 8086/5aee PCI: 00:18.3 cmd <- 02 PCI: 00:19.0 subsystem <- 8086/5ac2 PCI: 00:19.0 cmd <- 02 PCI: 00:19.1 subsystem <- 8086/5ac4 PCI: 00:19.1 cmd <- 02 PCI: 00:19.2 subsystem <- 8086/5ac6 PCI: 00:19.2 cmd <- 02 PCI: 00:1e.0 subsystem <- 8086/5ad0 PCI: 00:1e.0 cmd <- 06 PCI: 00:1f.0 subsystem <- 8086/5ae8 PCI: 00:1f.0 cmd <- 07 PCI: 00:1f.1 subsystem <- 8086/5ad4 PCI: 00:1f.1 cmd <- 03 done. BS: BS_DEV_ENABLE run times (exec / console): 1 / 193 ms reply is too large BS: BS_DEV_INIT entry times (exec / console): 3 / 2 ms POST: 0x75 Initializing devices... POST: 0x75 CPU_CLUSTER: 0 init MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007b000000 size 0x7af40000 type 6 0x000000007b000000 - 0x0000000080000000 size 0x05000000 type 0 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0 0x0000000100000000 - 0x0000000180000000 size 0x80000000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 CPU physical address size: 39 bits MTRR: default type WB/UC MTRR counts: 6/5. MTRR: UC selected as default type. MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 MTRR: 1 base 0x000000007b000000 mask 0x0000007fff000000 type 0 MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1 MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled POST: 0x93 Setting up local APIC... apic_id: 0x00 done. Detected 4 core, 4 thread CPU. Will perform SMM setup. CBFS: Found 'cpu_microcode_blob.bin' @0xa000 size 0xbc00 in mcache @0x7abfd0ac microcode: sig=0x506c9 pf=0x1 revision=0x3c microcode: updated to revision 0x40 date=2020-02-27 CPU: Intel(R) Celeron(R) CPU J3455 @ 1.50GHz. Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170 Processing 16 relocs. Offset value of 0x00030000 Attempting to start 3 APs Waiting for 10ms after sending INIT. Waiting for 1st SIPI to complete...done. Waiting for 2nd SIPI to complete...done. AP: slot 1 apic_id 6, MCU rev: 0x0000003c AP: slot 3 apic_id 2, MCU rev: 0x00000040 AP: slot 2 apic_id 4, MCU rev: 0x0000003c Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0 Processing 11 relocs. Offset value of 0x00038000 SMM Module: stub loaded at 0x00038000. Will call 0x7aba0383 Installing permanent SMM handler to 0x7b000000 Loading module at 0x7b010000 with entry 0x7b010a5d. filesize: 0x2670 memsize: 0x6760 Processing 164 relocs. Offset value of 0x7b010000 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1a0 memsize: 0x1a0 Processing 11 relocs. Offset value of 0x7b008000 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a5d Clearing SMI status registers WAK smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2 Relocation complete. Initializing CPU #0 CPU: vendor Intel device 506c9 CPU: family 06, model 5c, stepping 09 CPU #0 initialized Initializing CPU #2 Initializing CPU #1 CPU: vendor Intel device 506c9 CPU: family 06, model 5c, stepping 09 Initializing CPU #3 CPU: vendor Intel device 506c9 CPU: family 06, model 5c, stepping 09 CPU: vendor Intel device 506c9 CPU: family 06, model 5c, stepping 09 CPU #1 initialized CPU #2 initialized CPU #3 initialized bsp_do_flight_plan done after 171 msecs. Enabling SMIs. MTRR: TEMPORARY Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007b000000 size 0x7af40000 type 6 0x000000007b000000 - 0x00000000ff800000 size 0x84800000 type 0 0x00000000ff800000 - 0x0000000100000000 size 0x00800000 type 5 0x0000000100000000 - 0x0000000180000000 size 0x80000000 type 6 MTRR: default type WB/UC MTRR counts: 11/5. MTRR: UC selected as default type. MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 MTRR: 1 base 0x000000007b000000 mask 0x0000007fff000000 type 0 MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0 MTRR: 3 base 0x00000000ff800000 mask 0x0000007fff800000 type 5 MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6 CPU_CLUSTER: 0 init finished in 479 msecs POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 PCI: 00:00.0 init PCI: 00:00.0 init finished in 0 msecs POST: 0x75 PCI: 00:00.2 init PCI: 00:00.2 init finished in 0 msecs POST: 0x75 PCI: 00:02.0 init CBFS: 'vbt.bin' not found. CBFS: 'pci8086,5a85.rom' not found. GMA: locate_vbt_vbios: 6be2 a85a 3 d0 13 GMA: VBT couldn't be found CBFS: 'pci8086,5a85.rom' not found. PCI: 00:02.0 init finished in 16 msecs POST: 0x75 POST: 0x75 PCI: 00:0d.1 init PMC: Using default GPE route. apm_control: Disabling ACPI. APMC done. SLP S3 assertion width: 2000000 usecs Set power on after power failure. PCI: 00:0d.1 init finished in 14 msecs POST: 0x75 POST: 0x75 PCI: 00:0d.3 init PCI: 00:0d.3 init finished in 0 msecs POST: 0x75 POST: 0x75 PCI: 00:0f.0 init PCI: 00:0f.0 init finished in 0 msecs POST: 0x75 PCI: 00:0f.1 init PCI: 00:0f.1 init finished in 0 msecs POST: 0x75 PCI: 00:0f.2 init PCI: 00:0f.2 init finished in 0 msecs POST: 0x75 PCI: 00:11.0 init PCI: 00:11.0 init finished in 0 msecs POST: 0x75 PCI: 00:12.0 init PCI: 00:12.0 init finished in 0 msecs POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 PCI: 00:15.0 init PCI: 00:15.0 init finished in 0 msecs POST: 0x75 PCI: 00:16.0 init I2C bus 0 version 0x3132312a DW I2C bus 0 at 0x91a1e000 (400 KHz) PCI: 00:16.0 init finished in 6 msecs POST: 0x75 PCI: 00:16.1 init I2C bus 1 version 0x3132312a DW I2C bus 1 at 0x91a20000 (400 KHz) PCI: 00:16.1 init finished in 6 msecs POST: 0x75 PCI: 00:16.2 init I2C bus 2 version 0x3132312a DW I2C bus 2 at 0x91a22000 (400 KHz) PCI: 00:16.2 init finished in 6 msecs POST: 0x75 PCI: 00:16.3 init I2C bus 3 version 0x3132312a DW I2C bus 3 at 0x91a24000 (400 KHz) PCI: 00:16.3 init finished in 6 msecs POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 POST: 0x75 PCI: 00:1e.0 init PCI: 00:1e.0 init finished in 0 msecs POST: 0x75 PCI: 00:1f.0 init RTC Init PCI: 00:1f.0 init finished in 1 msecs POST: 0x75 PCI: 00:1f.1 init PCI: 00:1f.1 init finished in 0 msecs Devices initialized BS: BS_DEV_INIT run times (exec / console): 94 / 604 ms ME: Version: Unavailable BS: BS_DEV_INIT exit times (exec / console): 1 / 3 ms POST: 0x76 Finalize devices... Devices finalized BS: BS_POST_DEVICE run times (exec / console): 0 / 5 ms POST: 0x77 BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 1 ms POST: 0x79 POST: 0x9c CBFS: Found 'fallback/dsdt.aml' @0x2c5c0 size 0x1c00 in mcache @0x7abfd1c8 CBFS: 'fallback/slic' not found. ACPI: Writing ACPI tables at 7ab22000. ACPI: * FACS ACPI: * DSDT PCI space above 4GB MMIO is at 0x180000000, len = 0x7e80000000 ACPI: * FADT SCI is IRQ9 ACPI: added table 1/32, length now 40 ACPI: * SSDT Found 1 CPU(s) with 4/4 physical/logical core(s) each. Turbo is available and visible PSS: 1501MHz power 10000 control 0x1700 status 0x1700 PSS: 1500MHz power 10000 control 0xf00 status 0xf00 PSS: 1400MHz power 9218 control 0xe00 status 0xe00 PSS: 1200MHz power 7728 control 0xc00 status 0xc00 PSS: 1000MHz power 6280 control 0xa00 status 0xa00 PSS: 800MHz power 4908 control 0x800 status 0x800 PSS: 1501MHz power 10000 control 0x1700 status 0x1700 PSS: 1500MHz power 10000 control 0xf00 status 0xf00 PSS: 1400MHz power 9218 control 0xe00 status 0xe00 PSS: 1200MHz power 7728 control 0xc00 status 0xc00 PSS: 1000MHz power 6280 control 0xa00 status 0xa00 PSS: 800MHz power 4908 control 0x800 status 0x800 PSS: 1501MHz power 10000 control 0x1700 status 0x1700 PSS: 1500MHz power 10000 control 0xf00 status 0xf00 PSS: 1400MHz power 9218 control 0xe00 status 0xe00 PSS: 1200MHz power 7728 control 0xc00 status 0xc00 PSS: 1000MHz power 6280 control 0xa00 status 0xa00 PSS: 800MHz power 4908 control 0x800 status 0x800 PSS: 1501MHz power 10000 control 0x1700 status 0x1700 PSS: 1500MHz power 10000 control 0xf00 status 0xf00 PSS: 1400MHz power 9218 control 0xe00 status 0xe00 PSS: 1200MHz power 7728 control 0xc00 status 0xc00 PSS: 1000MHz power 6280 control 0xa00 status 0xa00 PSS: 800MHz power 4908 control 0x800 status 0x800 ACPI: added table 2/32, length now 44 ACPI: * MCFG ACPI: added table 3/32, length now 48 ACPI: * MADT SCI is IRQ9 ACPI: added table 4/32, length now 52 current = 7ab24950 ACPI: * DMAR ACPI: added table 5/32, length now 56 ACPI: added table 6/32, length now 60 ACPI: * HPET ACPI: added table 7/32, length now 64 ACPI: done. ACPI tables: 10896 bytes. smbios_write_tables: 7ab21000 SMBIOS firmware version is set to coreboot_version: '4.13-3184-ga0c7f34302' SMBIOS tables: 605 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 252a Writing coreboot table at 0x7ab46000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-000000000fffffff: RAM 4. 0000000010000000-0000000012150fff: RESERVED 5. 0000000012151000-000000007ab20fff: RAM 6. 000000007ab21000-000000007ab89fff: CONFIGURATION TABLES 7. 000000007ab8a000-000000007abcffff: RAMSTAGE 8. 000000007abd0000-000000007affffff: CONFIGURATION TABLES 9. 000000007b000000-000000007fffffff: RESERVED 10. 00000000d0000000-00000000d0ffffff: RESERVED 11. 00000000e0000000-00000000efffffff: RESERVED 12. 00000000fe042000-00000000fe043fff: RESERVED 13. 00000000fed10000-00000000fed17fff: RESERVED 14. 00000000fed64000-00000000fed65fff: RESERVED 15. 0000000100000000-000000017fffffff: RAM SF: Detected 00 0000 with sector size 0x1000, total 0x1000000 Wrote coreboot table at: 0x7ab46000, 0x44c bytes, checksum 641b coreboot table: 1124 bytes. IMD ROOT 0. 0x7afff000 0x00001000 IMD SMALL 1. 0x7affe000 0x00001000 FSP MEMORY 2. 0x7abfe000 0x00400000 RO MCACHE 3. 0x7abfd000 0x00000354 CONSOLE 4. 0x7abdd000 0x00020000 TIME STAMP 5. 0x7abdc000 0x00000910 ROMSTG STCK 6. 0x7abdb000 0x00001000 AFTER CAR 7. 0x7abd0000 0x0000b000 RAMSTAGE 8. 0x7ab89000 0x00047000 REFCODE 9. 0x7ab5e000 0x0002b000 SMM BACKUP 10. 0x7ab4e000 0x00010000 COREBOOT 11. 0x7ab46000 0x00008000 ACPI 12. 0x7ab22000 0x00024000 SMBIOS 13. 0x7ab21000 0x00000800 IMD small region: IMD ROOT 0. 0x7affec00 0x00000400 FSP RUNTIME 1. 0x7affebe0 0x00000004 FMAP 2. 0x7affe920 0x000002ae POWER STATE 3. 0x7affe8e0 0x00000040 ROMSTAGE 4. 0x7affe8c0 0x00000004 ACPI GNVS 5. 0x7affe7c0 0x00000100 BS: BS_WRITE_TABLES run times (exec / console): 1 / 401 ms POST: 0x7a CBFS: Found 'fallback/payload' @0xb8340 size 0xb7c82 in mcache @0x7abfd2c4 Checking segment from ROM address 0xffcfb36c Checking segment from ROM address 0xffcfb388 Loading segment from ROM address 0xffcfb36c code (compression=1) New segment dstaddr 0x00800000 memsize 0x800000 srcaddr 0xffcfb3a4 filesize 0xb7c4a Loading Segment: addr: 0x00800000 memsz: 0x0000000000800000 filesz: 0x00000000000b7c4a using LZMA Loading segment from ROM address 0xffcfb388 Entry Point 0x00803120 BS: BS_PAYLOAD_LOAD run times (exec / console): 234 / 49 ms POST: 0x95 POST: 0x95 POST: 0x88 POST: 0x89 CSE FWSTS1: 0x80003042 CSE FWSTS2: 0x30220000 CSE FWSTS3: 0x00000000 CSE FWSTS4: 0x00080004 CSE FWSTS5: 0x00000000 CSE FWSTS6: 0x40000000 ME: Manufacturing Mode : NO ME: FPF status : unknown BUG: check_xdci_enable requests hidden 00:15.1 BS: BS_PAYLOAD_LOAD exit times (exec / console): 7 / 31 ms POST: 0x7b mp_park_aps done after 0 msecs. Jumping to boot code at 0x00803120(0x7ab46000) POST: 0xf8 [=3h[=3hBooting from 'USB: Synology DiskStation ' failed; verify it contains a 64-bit UEFI OS. Press any key to continue booting... UEFI Interactive Shell v2.2 EDK II UEFI v2.70 (EDK II, 0x00010000) Mapping table  FS0: Alias(s):HD0d0b:;BLK1: PciRoot(0x0)/Pci(0x15,0x0)/USB(0x3,0x0)/HD(1,GPT,52E06AC1-951D-4BAC-9B18-3F0821438255,0x800,0x10000)  FS1: Alias(s):HD0d0c:;BLK2: PciRoot(0x0)/Pci(0x15,0x0)/USB(0x3,0x0)/HD(2,GPT,99421BB0-B00A-430C-BCDE-E41AB10FE55D,0x10800,0x2A000)  BLK0: Alias(s): PciRoot(0x0)/Pci(0x15,0x0)/USB(0x3,0x0) Welcome to the UEFI Shell! If you wound up here by mistake, just type 'exit' to return to the UEFI Options Menu. Shell>  Shell>  Shell> h fs0: FS0:\> cd EFI      Ef FI\boot\SynoSynoBootLoader.confSynoBootLoader.efi  Welcome to GRUB! [?25lGNU GRUB version 2.00  Press "CTRL-C" for boot menu or it boots automatically in 10s.  Press "CTRL-C" for boot menu or it boots automatically in 9s.  Press "CTRL-C" for boot menu or it boots automatically in 8s.  Press "CTRL-C" for boot menu or it boots automatically in 7s.  Press "CTRL-C" for boot menu or it boots automatically in 6s.  Press "CTRL-C" for boot menu or it boots automatically in 5s.  Press "CTRL-C" for boot menu or it boots automatically in 4s.  Press "CTRL-C" for boot menu or it boots automatically in 3s.  Press "CTRL-C" for boot menu or it boots automatically in 2s.  Press "CTRL-C" for boot menu or it boots automatically in 1s.  Press "CTRL-C" for boot menu or it boots automatically in 0s. [?25h Booting `Gentoo' Connected to /dev/cuaU0 (speed 115200) [EOT]