[nix-shell:~/dev/zig/build]$ ./zig build-exe hello.zig -target arm-linux -mcpu=generic+derp Unknown CPU feature: 'derp' Available CPU features for architecture 'arm': 32bit: Prefer 32-bit Thumb instrs 8msecext: Enable support for ARMv8-M Security Extensions a76: Cortex-A76 ARM processors aclass: Is application profile ('A' series) acquire_release: Has v8 acquire/release (lda/ldaex etc) instructions aes: Enable AES support avoid_movs_shop: Avoid movs instructions with shifter operand avoid_partial_cpsr: Avoid CPSR partial update for OOO execution cheap_predicable_cpsr: Disable +1 predication cost for instructions updating CPSR crc: Enable support for CRC instructions crypto: Enable support for Cryptography extensions d32: Extend FP to 32 double registers db: Has data barrier (dmb/dsb) instructions dfb: Has full data barrier (dfb) instruction disable_postra_scheduler: Don't schedule again after register allocation dont_widen_vmovs: Don't widen VMOVS to VMOVD dotprod: Enable support for dot product instructions dsp: Supports DSP instructions in ARM and/or Thumb2 execute_only: Enable the generation of execute only code. expand_fp_mlx: Expand VFP/NEON MLA/MLS instructions exynos: Samsung Exynos processors fp16: Enable half-precision floating point fp16fml: Enable full half-precision floating point fml instructions fp64: Floating point unit supports double precision fp_armv8: Enable ARMv8 FP fp_armv8d16: Enable ARMv8 FP with only 16 d-registers fp_armv8d16sp: Enable ARMv8 FP with only 16 d-registers and no double precision fp_armv8sp: Enable ARMv8 FP with no double precision fpao: Enable fast computation of positive address offsets fpregs: Enable FP registers fpregs16: Enable 16-bit FP registers fpregs64: Enable 64-bit FP registers fullfp16: Enable full half-precision floating point fuse_aes: CPU fuses AES crypto operations fuse_literals: CPU fuses literal generation operations has_v4t: Support ARM v4T instructions has_v5t: Support ARM v5T instructions has_v5te: Support ARM v5TE, v5TEj, and v5TExp instructions has_v6: Support ARM v6 instructions has_v6k: Support ARM v6k instructions has_v6m: Support ARM v6M instructions has_v6t2: Support ARM v6t2 instructions has_v7: Support ARM v7 instructions has_v7clrex: Has v7 clrex instruction has_v8_1a: Support ARM v8.1a instructions has_v8_1m_main: Support ARM v8-1M Mainline instructions has_v8_2a: Support ARM v8.2a instructions has_v8_3a: Support ARM v8.3a instructions has_v8_4a: Support ARM v8.4a instructions has_v8_5a: Support ARM v8.5a instructions has_v8: Support ARM v8 instructions has_v8m: Support ARM v8M Baseline instructions has_v8m_main: Support ARM v8M Mainline instructions hwdiv: Enable divide instructions in Thumb hwdiv_arm: Enable divide instructions in ARM mode iwmmxt: ARMv5te architecture iwmmxt2: ARMv5te architecture lob: Enable Low Overhead Branch extensions long_calls: Generate calls via indirect call instructions loop_align: Prefer 32-bit alignment for loops m3: Cortex-M3 ARM processors mclass: Is microcontroller profile ('M' series) mp: Supports Multiprocessing extension muxed_units: Has muxed AGU and NEON/FPU mve: Support M-Class Vector Extension with integer ops mve_fp: Support M-Class Vector Extension with integer and floating ops nacl_trap: NaCl trap neon: Enable NEON instructions neon_fpmovs: Convert VMOVSR, VMOVRS, VMOVS to NEON neonfp: Use NEON for single precision FP no_branch_predictor: Has no branch predictor no_movt: Don't use movt/movw pairs for 32-bit imms no_neg_immediates: Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding. noarm: Does not support ARM mode execution nonpipelined_vfp: VFP instructions are not pipelined perfmon: Enable support for Performance Monitor extensions prefer_ishst: Prefer ISHST barriers prefer_vmovsr: Prefer VMOVSR prof_unpr: Is profitable to unpredicate r4: Cortex-R4 ARM processors ras: Enable Reliability, Availability and Serviceability extensions rclass: Is realtime profile ('R' series) read_tp_hard: Reading thread pointer from register reserve_r9: Reserve R9, making it unavailable as GPR ret_addr_stack: Has return address stack sb: Enable v8.5a Speculation Barrier sha2: Enable SHA1 and SHA256 support slow_fp_brcc: FP compare + branch is slow slow_load_D_subreg: Loading into D subregs is slow slow_odd_reg: VLDM/VSTM starting with an odd register is slow slow_vdup32: Has slow VDUP32 - prefer VMOV slow_vgetlni32: Has slow VGETLNi32 - prefer VMOV slowfpvmlx: Disable VFP / NEON MAC instructions soft_float: Use software floating point features. splat_vfp_neon: Splat register from VFP to NEON strict_align: Disallow all unaligned memory access swift: Swift ARM processors thumb2: Enable Thumb2 instructions thumb_mode: Thumb mode trustzone: Enable support for TrustZone security extensions use_aa: Use alias analysis during codegen use_misched: Use the MachineScheduler v2: ARMv2 architecture v2a: ARMv2a architecture v3: ARMv3 architecture v3m: ARMv3m architecture v4: ARMv4 architecture v4t: ARMv4t architecture v5t: ARMv5t architecture v5te: ARMv5te architecture v5tej: ARMv5tej architecture v6: ARMv6 architecture v6j: ARMv7a architecture v6k: ARMv6k architecture v6kz: ARMv6kz architecture v6m: ARMv6m architecture v6sm: ARMv6sm architecture v6t2: ARMv6t2 architecture v7a: ARMv7a architecture v7em: ARMv7em architecture v7k: ARMv7a architecture v7m: ARMv7m architecture v7r: ARMv7r architecture v7s: ARMv7a architecture v7ve: ARMv7ve architecture v8a: ARMv8a architecture v8m: ARMv8mBaseline architecture v8m_main: ARMv8mMainline architecture v8r: ARMv8r architecture v8_1a: ARMv81a architecture v8_1m_main: ARMv81mMainline architecture v8_2a: ARMv82a architecture v8_3a: ARMv83a architecture v8_4a: ARMv84a architecture v8_5a: ARMv85a architecture vfp2: Enable VFP2 instructions vfp2d16: Enable VFP2 instructions vfp2d16sp: Enable VFP2 instructions with no double precision vfp2sp: Enable VFP2 instructions with no double precision vfp3: Enable VFP3 instructions vfp3d16: Enable VFP3 instructions with only 16 d-registers vfp3d16sp: Enable VFP3 instructions with only 16 d-registers and no double precision vfp3sp: Enable VFP3 instructions with no double precision vfp4: Enable VFP4 instructions vfp4d16: Enable VFP4 instructions with only 16 d-registers vfp4d16sp: Enable VFP4 instructions with only 16 d-registers and no double precision vfp4sp: Enable VFP4 instructions with no double precision virtualization: Supports Virtualization extension vldn_align: Check for VLDn unaligned access vmlx_forwarding: Has multiplier accumulator forwarding vmlx_hazards: Has VMLx hazards wide_stride_vfp: Use a wide stride when allocating VFP registers xscale: ARMv5te architecture zcz: Has zero-cycle zeroing instructions